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DP8496 Datasheet(PDF) 61 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8496
Description  SCSI-2 Disk Data Controller
PDF  92 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8496 Datasheet(HTML) 61 Page - National Semiconductor (TI)

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40 Functional Description (Continued)
DCBSY
Same as above Affects the DBSY pin In effect only during
manual mode
DCSEL
Same as above Affects the SEL pin In effect only during
manual mode
DCTARG
Same as above Affects the DTARG pin which controls the
direction of target signals CD IO REQ MSG In effect
only during manual mode
DCINIT
Same as above Affects the DINIT pin which controls the
direction of initiator signals ACK ATN In effect only during
manual mode
DCRST
Same as above Affects the DRST pin In effect only during
manual mode
SCK(10)
By programming these two bits the user can adjust the set-
up time delay of REQ and ACK signals with respect to the
SCSI Data signals Delay values of approximately 1 15 or
2 Bus Clock periods are possible depending on the values
of these bits and the CLK(10) bits of the Setup 1 register
Default values for these bits are 00
TABLE 428 SCSI Strobe Time Settings
SCSI Clock Bits (10)
00
01
11
10
BCLK
00
10
10
20
15
Freq
01
15
10
20
15
(10)
10
15
10
20
15
11
15
10
20
15
Where
10 is defined as bcp b k k is a characterization constant
15 is defined as bcp a bc b k bc is either bcl or bch
20 is defined as 2 bcp b k k is a characterization constant
bcp bch and bcl refer to the BCLK period high pulse width and low pulse
width respectively
443 SCSI Operations
Extending the Current SCSI Command
SCSI commands may be programmed to transfer more
blocks than originaly programmed If a new value is written
to the Block Count holding register while a SCSI command
is executing the new value will be downloaded from the
holding register to the active register when the active Block
Count reaches zero This new Block Count must be written
to the Block Count holding register any time before the ac-
tive Block Count reaches zero The Block Count register
should not be updated again (after the first pipelined value)
until the previous pipelined value has been downloaded
The ‘‘Group Complete’’ interrupt indicates when the pipe-
lined Block Count is downloaded
The SCSI Pointer can also be modified when extending the
current executing SCSI commandallowing for noncontigu-
ous buffer memory transfers If the current executing SCSI
command is a single phase information transfer command
the SCSI Pointer can be modified after 10 BCLK periods
have passed since the SCSI command was issued If the
current executing SCSI command is a reselect combination
command the SCSI Pointer can be modified after detecting
the SCSI data transfer phase The SCSI pointer should not
be updated again (after the first pipelined value) until the
previous pipelined value has been downloaded If the SCSI
pointer have been modified the ‘‘Group Complete’’ interrupt
indicates when the pipelined SCSI pointer is downloaded
If the SCSI pointer has not been modified when extending
the current executing SCSI command a SCSI pointer down-
load will not occur and contiguous buffer memory transfers
will result Although ‘‘Group Complete’’ interrupts will still
occur at the completion of each transfer
The ‘‘Group Complete’’ interrupt indicates when the pipe-
lined Block Count and the SCSI Pointer (if modified) are
downloaded After this interrupt is received the Block Count
register and SCSI Pointer registers may be updated again
A SCSI command may be extended multiple times if de-
sired Simply wait for the ‘‘Group Complete’’ interrupt be-
tween each update of the Block Count register
Table 429 summarizes these interrupts
Pipelining SCSI Commands
There are several combinations of SCSI commands that
can be pipelined
Receive Data followed by Send Disconnect
Receive Data followed by Send End
Send Data followed by Send Disconnect
Send Data followed by Send End
Reselect-Receive Data followed by Send Disconnect
Reselect-Receive Data followed by Send End
Reselect-Send Data followed by Send Disconnect
Reselect-Send Data followed by Send End
Except for the Clear Pending command only these com-
mand pairs can be pipelined The Send End Send Discon-
nect and Clear Pending commands are the only commands
allowed to be pipelined No additional commands can be
written to the SCSI Command register until the pipelined
command has completed its operation
The Clear Pending Command can be issued to clear the
pipelined command if the first command is still executing
and the pipelined command has not yet begun
In addition changing the SCSI pointer or the Block Count
register does not affect the pipelined Send End or Send
Disconnect command If the Block Count register is modi-
fied after the Send End or Send Disconnect command has
been pipelined the current executing SCSI command may
possibly be extended
A pipelined command should not be issued before 10 BCLK
periods have passed since the first command was issued
It is important to understand how the DP84967 determines
completion interrupts when pipelining commands It is pos-
sible to completely miss a completion interrupt if errors do
not occur for either of the pipelined commands Refer to
Table 427 for a description of when completion interrupts
are generated and how they are buffered
61



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