DP8496 datasheet(57/92 Pages) NSC

57 / 92 page

40 Functional Description (Continued)

Error Code

The error code is used in conjunction with the Status Codes

to determine the present state of the SCSI interface In the

case of a SCSI Data Overrun error occurring at the same

time as a SCSI parity error the more serious error SCSI

Data Overrun will be encoded In the case where the SE bit

of the SCSI Operation register is set and therefore a SCSI

parity error causes the current command to terminate imme-

diately a SCSI data overrun may be caused In this case

also the error code for SCSI Data Overrun will be reported

effectively masking the original SCSI parity error from being

reported

TABLE 424 Error Codes

Error Code

Error

No Error

SCSI Parity Error

SCSI Data Overrun

The Error Code field is cleared to zero when a new com-

mand is downloaded and executed

SCSI Parity Error (0 1)

This code is present in any Selection or Information transfer

phase upon detection of a parity error from the SCSI bus in

either Auto or Manual mode

SCSI Data Overrun (1 1)

This code is set if the DP84967 receives too many bytes to

transfer in the available bandwidth to buffer memory Data

loss has occurred If this error occurs in any transfer mode

it indicates a lack of available buffer memory bandwidth If it

occurs during an Asynchronous transfer some AC timing

specification has been violatedsuch as too fast a REQ

ACK period for a given BCLK There must be at least 2

BCLK periods per REQ or ACK period

Also set if 2 REQ pulses are received before a Transfer Info

or Transfer Pad command in Initiator mode is issued by the

processor This indicates that the Target device is in Syn-

chronous Transfer mode and the DP84967 is not set up to

respond in this mode

During synchronous transfers if the number of outstanding

REQ or ACK pulses received is greater than the pro-

grammed offset (offset overflow) this error will be set

Also set if there are any abnormal handshakes between

REQ and ACK Examples may be an ACK which deasserts

before REQ or any non-match of REQACK pulses follow-

ing a Synchronous mode transfer

Status Code

This field indicates present bus condition and in the case of

bus free phase how the DP84967 arrived in the phase All

bits are latched on the leading edge of the RD strobe and

will not change during the read cycle

Note that the state of the ATN signal can be read at any

time in any mode through the SCSI Control register

The Status Code is not valid while in the Manual mode The

Status Code is also not valid after an ‘‘Invalid Command’’

interrupt has been generated

Important In Initiator mode information transfer phases are

updated on the leading edge of REQ If during a Transfer

Info or Transfer Pad command the phase changes from

that detected on the first REQ the command will be aborted

with an ‘‘Uncompleted Command’ interrupt if there is no

parity error

TABLE 425 Status Codes

Status

Code

Comment

3210

0000

Bus Free or Idle due to Reset command

CRST pin SCSI bus reset normal

disconnection for initiator or Abort

(Re)Selection command

0001

Bus Free due to command complete

(except after Abort (Re)Select command

or Reset command) Target mode only

0010

A DP84967 initiated Arbitration phase is

pending or in progress

0011

A DP84967 initiated (Re)Selection phase

is in progress

0100

Selected The DP84967 has been

Selected as a Target

0101

Reselected The DP84967 has been

Reselected as an Initiator and the

‘‘Reselected’’ interrupt completion code

has not yet been cleared

0110

Unexpected bus free in Initiator mode

Command has been aborted

0111

Connected but no pending command

1000

Data Out Phase

1001

Unspecified Info Out Phase

1010

Command Phase

1011

Message Out Phase

1100

Data In Phase

1101

Unspecified Info In Phase

1110

Status Phase

1111

Message In Phase

While in the Initiator mode the Status Code will be frozen at

the time that an error completion code is generated (not

code ‘‘001’’) When the completion interrupt is cleared the

Status Code will return to normal operation A completion

code of ‘‘001’’ will not freeze the Status Code

SCSI Interrupt (SINT)

49h

76543210

PCMP

ATN

GTC

BTC

LCI

Completion Interrupt Code

This register indicates interrupts that have occurred There

are two types of interrupts checkpoint and completion

Checkpoint interrupts (bits 3 – 7) are separated into separate

bits and may be asserted simultaneously These interrupts

may be cleared only by writing a ‘‘1’’ into the corresponding

bit location These bits may be cleared individually or simul-

taneously

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