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AMD-761 Datasheet(PDF) 63 Page - Advanced Micro Devices

Part # AMD-761
Description  AMD-761-TM System Controller Software/BIOS Design Guide
PDF  264 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-761 Datasheet(HTML) 63 Page - Advanced Micro Devices

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Chapter 2
AMD-761™ System Controller Programmer’s Interface
51
24081D—February 2002
AMD-761™ System Controller Software/BIOS Design Guide
Preliminary Information
DRAM Timing
Dev0:F0:0x54
Register Description
This register defines the DRAM timing parameters for all banks. BIOS software must set appropriate values in this register
before setting the SDRAM_Init bit (See “Bit Definitions DRAM Mode/Status (Dev0:F0:0x58)” on page 57) or attempting
any DRAM accesses.
Note that this register is not initialized at reset time, and all bits must be initialized by BIOS for proper operation. This
action should be done prior to attempting DRAM access.
31
30
29
28
27
26
25
24
Bit
SBPWaitState AddrTiming_A AddrTiming_B RD_Wait_State Reg_DIMM_En
tWTR
tWR
Reset
XXXXXXXX
R/W
R/W
23
22
21
20
19
18
17
16
Bit
tRRD
Reserved
Idle_Cyc_Limit
Reset
X0000XXX
R/W
R/W
R
R/W
15
14
13
12
11
10
9
8
Bit
PH_Limit
Reserved
tRC
tRP
Reset
XX00XXXX
R/W
R/W
R
R/W
7
6
5
4
3
2
1
0
Bit
tRP
tRAS
tCL
tRCD
Reset
XXXXXXXX
R/W
R/W



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