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AMD-761 Datasheet(PDF) 78 Page - Advanced Micro Devices |
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AMD-761 Datasheet(HTML) 78 Page - Advanced Micro Devices |
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78 / 264 page  66 AMD-761™ System Controller Programmer’s Interface Chapter 2 AMD-761™ System Controller Software/BIOS Design Guide 24081D—February 2002 Preliminary Information Memory Status/Control Dev0:F0:0x70 Register Description This register provides general status and control for the memory controller. Note that the Self_Ref_En bit in this register is not initialized at reset time, but must be initialized by BIOS for proper operation. This action should be done prior to attempting DRAM access. 31 30 29 28 27 26 25 24 Bit Reserved Reset 00000000 R/W R 23 22 21 20 19 18 17 16 Bit Reserved Self_Ref_En Reset 00000X00 R/W R R/W 15 14 13 12 11 10 9 8 Bit Reserved PCI_Pipe_En PCI_Blk_WR _En Reserved Reset 00000000 R/W R/W R R/W R 7 6 5 4 3 2 1 0 Bit Reserved Reserved Reserved Reserved Reserved Reserved Reset 00000000 R/W R R R |
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