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AMD-761 Datasheet(PDF) 69 Page - Advanced Micro Devices

Part # AMD-761
Description  AMD-761-TM System Controller Software/BIOS Design Guide
PDF  264 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-761 Datasheet(HTML) 69 Page - Advanced Micro Devices

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Chapter 2
AMD-761™ System Controller Programmer’s Interface
57
24081D—February 2002
AMD-761™ System Controller Software/BIOS Design Guide
Preliminary Information
Bit Definitions
DRAM Mode/Status (Dev0:F0:0x58)
Bit
Name
Function
31
Clk_Dis5
Clock Disable
This bit controls the DDR CLKOUT5/CLKOUT5# differential clock pair:
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.
30
Clk_Dis4
Clock Disable
This bit controls the DDR CLKOUT4/CLKOUT4# differential clock pair.
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.
29
Clk_Dis3
Clock Disable
This bit controls the DDR CLKOUT3/CLKOUT3# differential clock pair.
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.
28
Clk_Dis2
Clock Disable
This bit controls the DDR CLKOUT2/CLKOUT2# differential clock pair.
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.
27
Clk_Dis1
Clock Disable
This bit controls the DDR CLKOUT1/CLKOUT1# differential clock pair.
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.
26
Clk_Dis0
Clock Disable
This bit controls the DDR CLKOUT0/CLKOUT0# differential clock pair.
0 = Clock pair enabled
1 = Clock pair disabled (three-stated)
Note:
This bit is meant to disable the clock pair when it is not connected to anything.
This bit should not be used for memory sizing or power management uses.



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