DA6021 datasheet(126/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

126 of 224

www.dialog-semiconductor.com

14. Power Source Detection

Overview

14.1

There are three input supply sources that can be detected by DA6021: VBAT, VDCIN_SENSE and

VBUS_SENSE referring respectively to the battery, AC adapter and USB connector. For all power sources

dedicated comparators are used for the power detection. All detectors include de-bounce logic with a nominal

time period of 100ms which can be disabled by software.

VBAT Power Source Detection

14.2

Battery Voltage Monitor & Removal / Insertion Detection

14.2.1

Figure 60: VBAT Input Detection

It is advantageous to use a battery pack with integrated BSI resistance (pull-down in the battery pack indicating

the ID or size) as it offers an advanced warning on battery removal events. Such an implementation is necessary

to meet the SDWN_B signal timing requirement of some modem SIM cards.

During normal operation (battery pack present/inserted), the BSI resistance in the battery pack pulls the analog

voltage at the BATID pin to an intermediate voltage, between VREF (ADC bias voltage from the VREFB pin) and

GND. When the BSI terminal of the battery pack no longer makes contact (as on removal), BATID is immediately

pulled high to VREF by the measurement resistance on the platform, RMBI (30KΩ to 200KΩ).

While using the BATID comparator sensing the battery insertion / removal, there are separate de-bounce times

for insertion and removal. This provides sufficient power-up time for USB PHY related components on insertion,

on the other hand it allows a quick detection time of battery removal for SIM card early warning (via SDWN_B).

Note that BAITD comparator is giving a low output if the battery is removed.

When BATRMSRC=1 (using BATID comparator), the thresholds in the table below define the present/absent

voltage trip points. Note that when using the BATID comparator to sense battery insertion / removal, there are

separate debounce times for insertion and removal. This is to allow for sufficient power-up sequencing of USB

PHY related components on insertion, and also allow for quick detection of battery removal for SIM card early

warning (via SDWN_B).

Parameter

Description

Min

Typ

Max

Unit

Val

V’BATIDREFH

BATID Rising threshold ( L->H,

indicating battery removal)

Typ-

0.025

0.9*Vref

Typ+

0.025

V’BATIDREFL

BATID Falling threshold ( H->L,

indicating battery insertion)

Typ-

0.025

0.8*Vref

Typ+

0.025

tDEBOUNCE

insert

BATID Presence Comparator

Debouncing Time (Insertion)

100

110

tDEBOUNCE

remove

BATID Presence Comparator

Debouncing Time (Removal)

µs

VBAT

analog

external

digital

VBATRMREF

2.0V

– 2.1V

sync

Debounce

100ms

BATIDREF

0.8VREF - 0.9VREF

sync

Debounce

(insert) 100ms

(removal) 30 - 60 us

BATID

PSDETCFG:

BATRMSRC

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