DA6021 datasheet(200/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

200 of 224

www.dialog-semiconductor.com

21. Pulse Width Modulation Generation

Overview

21.1

The PWM block is used to generate up to three PWM signals on three dedicated output pins. Mainly they are

used to drive display backlight circuits. All the PWM outputs can be enabled on demand. In addition the

functionality is gates with power sequencer state as for this the high frequency oscillator is needed in order to

provide the 6 MHz clock needed to generate the signal.

Functional Description

21.2

Each of the PWM outputs is able to generate output frequencies from ~23.44 KHz down to ~183Hz in 128 steps.



f= (6MHz/256) / (FREQ+1)

The duty cycle can be selected between 1/256 to 256/256 (always high).

PWM Output Signals

21.3

There are 3 PWM output signals (PWM[2:0]) on DA6021

Name

I/O

Voltage

Level

Mode

Pin Level

Internal

pu/pd

PWM[2:0]

1.8V

CMOS

Low

Table 111: PWM Output Signals

PWM Registers

21.4

PWM1CFG1

Address

0x4B

Page 1

Read/Write

Reset Value 0x00

MSB

LSB

R/W

ENA

FREQ

FREQ[6:0]

126

127

f0 = 6MHz/256

f=f0

f=f0/2

…

f=f0/127

f=f0/128

ENA

PWM1 disable

PWM1 enable

DA6021 Datasheet(PDF) 200 Page - Renesas Technology Corp

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