TMS320F datasheet(158/389 Pages) TI

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CALL

Call Unconditionally

7-58

Syntax

CALL

pma [, ind [, ARn] ]

Indirect addressing

Operands

pma:

16-bit program-memory address

Value from 0 to 7 designating the next auxiliary register

ind:

Select one of the following seven options:

*–

*0+

*0–

*BR0+

*BR0–

CALL

pma [, ind [, ARn] ]

987

6543

210

ARU

NAR

pma

Note:

ARU, N, and NAR are defined in section 6.3,

Indirect Addressing Mode (page 6-9).

Execution

PC + 2

→ TOS

pma

→ PC

Modify (current AR) and (ARP) as specified.

Status Bits

None

Description

The current program counter (PC) is incremented and pushed onto the top of

the stack (TOS). Then, the contents of the pma, either a symbolic or numeric

address, are loaded into the PC. Execution continues at this address. The cur-

rent auxiliary register and ARP contents are modified as specified.

Words

Cycles for a Single CALL Instruction

ROM

DARAM

SARAM

External

4+4p†

Note:

When this instruction reaches the execute phase of the pipeline, two additional instruc-

tion words have entered the pipeline. When the PC discontinuity is taken, these two

instruction words are discarded.

Example

CALL

191,*+,AR0

Before Instruction

After Instruction

ARP

AR1

05h

AR1

06h

30h

0BFh

TOS

100h

TOS

32h

Program address 0BFh (191) is loaded into the program counter, and the pro-

gram continues executing from that location.

Opcode

Cycles

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