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TMS320F Datasheet(PDF) 174 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 174 Page - Texas Instruments

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LACL
Load Low Accumulator and Clear High Accumulator
7-74
Syntax
LACL
dma
Direct addressing
LACL
ind [, ARn]
Indirect addressing
LACL #
k
Short immediate
Operands
dma:
7 LSBs of the data-memory address
n:
Value from 0 to 7 designating the next auxiliary register
k:
8-bit short immediate value
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
LACL
dma
15
14
13
12
11
10
987
6543
210
0
1
1
0
1
0
0
1
0
dma
LACL
ind [, ARn]
15
14
13
12
11
10
987
6543
210
0
1
1
0
1
0
0
1
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
LACL #
k
15
14
13
12
11
10
987
6543
210
1
0
1
1
1
0
0
1
k
Execution
Increment PC, then ...
Events
Addressing mode
0
→ ACC(31:16)
Direct or indirect
(data-memory address)
→ ACC(15:0)
0
→ ACC(31:8)
Short immediate
k
→ ACC(7:0)
Status Bits
This instruction is not affected by SXM.
Description
The contents of the addressed data-memory location or a zero-extended 8-bit
constant are loaded into the 16 low-order bits of the accumulator. The upper
half of the accumulator is zeroed. The data is treated as an unsigned 16-bit
number rather than a 2s-complement number. There is no sign extension of
the operand with this instruction, regardless of the state of SXM.
Words
1
Opcode



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