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TMS320F Datasheet(PDF) 179 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 179 Page - Texas Instruments

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Load Auxiliary Register
LAR
7-79
Assembly Language Instructions
Syntax
LAR AR
x, dma
Direct addressing
LAR AR
x, ind [, ARn]
Indirect addressing
LAR AR
x, #k
Short immediate addressing
LAR AR
x, #lk
Long immediate addressing
Operands
x:
Value from 0 to 7 designating the auxiliary register to be loaded
dma:
7 LSBs of the data-memory address
k:
8-bit short immediate value
lk:
16-bit long immediate value
n:
Value from 0 to 7 designating the next auxiliary register
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
LAR AR
x, dma
15
14
13
12
11
10
987
6543
210
0
0
0
0
0
x
0
dma
LAR AR
x, ind [ , ARn ]
15
14
13
12
11
10
987
6543
210
0
0
0
0
0
x
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
LAR AR
x, #k
15
14
13
12
11
10
987
6543
210
1
0
1
1
0
x
k
LAR AR
x, #lk
15
14
13
12
11
10
987
6543
210
1
0
1
1
1
1
1
1
0
0
0
0
1
x
lk
Execution
Increment PC, then ...
Event
Addressing mode
(data-memory address)
→ ARx
Direct or indirect
k
→ ARx
Short immediate
lk
→ ARx
Long immediate
Status Bits
None
Opcode



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