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TMS320F Datasheet(PDF) 182 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 182 Page - Texas Instruments

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LDP
Load Data Page Pointer
7-82
Syntax
LDP
dma
Direct addressing
LDP
ind [, ARn]
Indirect addressing
LDP #
k
Short immediate
addressing
Operands
dma:
7 LSBs of the data-memory address
n:
Value from 0 to 7 designating the next auxiliary register
k:
9-bit short immediate value
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
LDP
dma
15
14
13
12
11
10
987
6543
210
0
0
0
0
1
1
0
1
0
dma
LDP
ind [, ARn]
15
14
13
12
11
10
987
6543
210
0
0
0
0
1
1
0
1
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
LDP #
k
15
14
13
12
11
10
987
6543
210
1
0
1
1
1
1
0
k
Execution
Increment PC, then ...
Event
Addressing mode
Nine LSBs of (data-memory address)
→ DP
Direct or indirect
k
→ DP
Short immediate
Status Bits
Affects
DP
Description
The nine LSBs of the contents of the addressed data-memory location or a
9-bit immediate value is loaded into the data page pointer (DP) of status regis-
ter ST0. The DP can also be loaded by the LST instruction.
In direct addressing, the 9-bit DP and the 7-bit value specified in the instruction
(dma) are concatenated to form the 16-bit data-memory address accessed by
the instruction. The DP provides the 9 MSBs, and dma provides the 7 LSBs.
Words
1
Opcode



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