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TMS320F Datasheet(PDF) 180 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 180 Page - Texas Instruments

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LAR
Load Auxiliary Register
7-80
Description
The contents of the specified data-memory address or an 8-bit or 16-bit
constant are loaded into the specified auxiliary register (ARx). The specified
constant is treated as an unsigned integer, regardless of the value of SXM.
The LAR and SAR (store auxiliary register) instructions can be used to load
and store the auxiliary registers during subroutine calls and interrupts. If an
auxiliary register is not being used for indirect addressing, LAR and SAR
enable the register to be used as an additional storage register, especially for
swapping values between data-memory locations without affecting the
contents of the accumulator.
Words
Words
Addressing mode
1
Direct, indirect or
short immediate
2
Long immediate
Cycles for a Single LAR Instruction (Using Direct and Indirect Addressing)
Program
Operand
ROM
DARAM
SARAM
External
DARAM
2
2
2
2+pcode
SARAM
2
2
2, 3†
2+pcode
External
2+dsrc
2+dsrc
2+dsrc
3+dsrc+pcode
† If the operand and the code are in the same SARAM block
Cycles for a Repeat (RPT) Execution of an LAR Instruction (Using Direct
and Indirect Addressing)
Program
Operand
ROM
DARAM
SARAM
External
DARAM
2n
2n
2n
2n+pcode
SARAM
2n
2n
2n, 2n+1†
2n+pcode
External
2n+ndsrc
2n+ndsrc
2n+ndsrc
2n+1+ndsrcpcode
† If the operand and the code are in the same SARAM block
Cycles for a Single LAR Instruction (Using Short Immediate Addressing)
ROM
DARAM
SARAM
External
2
2
2
2+pcode
Cycles for a Single LAR Instruction (Using Long Immediate Addressing)
ROM
DARAM
SARAM
External
2
2
2
2+2p
Cycles



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