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TMS320F Datasheet(PDF) 212 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 212 Page - Texas Instruments

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MPY
Multiply
7-112
Syntax
MPY
dma
Direct addressing
MPY
ind [, ARn]
Indirect addressing
MPY #
k
Short immediate addressing
Operands
dma:
7 LSBs of the data-memory address
n:
Value from 0 to 7 designating the next auxiliary register
k:
13-bit short immediate value
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
MPY
dma
15
14
13
12
11
10
987
6543
210
0
1
0
1
0
1
0
0
0
dma
MPY
ind [, ARn]
15
14
13
12
11
10
987
6543
210
0
1
0
1
0
1
0
0
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
MPY #
k
15
14
13
12
11
10
987
6543
210
1
1
0
k
Execution
Increment PC, then ...
Event
Addressing mode
(TREG)
× (data-memory address) → PREG
Direct or indirect
(TREG)
× k → PREG
Short immediate
Status Bits
None
Description
The contents of TREG are multiplied by the contents of the addressed data
memory location. The result is placed in the product register (PREG). With
short immediate addressing, TREG is multiplied by a signed 13-bit constant.
The short-immediate value is right justified and sign extended before the multi-
plication, regardless of SXM.
Words
1
Opcode



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