TMS320F datasheet(257/389 Pages) TI

257 / 389 page

Shift Accumulator Right

SFR

7-157

Assembly Language Instructions

Syntax

SFR

Operands

None

Opcode

Execution

Increment PC, then ...

If SXM = 0

Then 0

→ ACC(31).

If SXM = 1

Then (ACC(31))

→ ACC(31)

(ACC(31:1))

→ ACC(30:0)

(ACC(0))

→ C

Status Bits

Affected by

Affects

SXM

Description

The SFR instruction shifts the accumulator right one bit.

- If SXM = 1, the instruction produces an arithmetic right shift. The sign bit

(MSB) is unchanged and is also copied into bit 30. Bit 0 is shifted into the

carry bit (C).

- If SXM = 0, the instruction produces a logic right shift. All of the accumula-

tor bits are shifted right by one bit. The least significant bit is shifted into

the carry bit, and the most significant bit is filled with a 0.

Words

Cycles for a Single SFR Instruction

ROM

DARAM

SARAM

External

1+p

Cycles for a Repeat (RPT) Execution of an SFR Instruction

ROM

DARAM

SARAM

External

n+p

Cycles

TMS320F Datasheet(PDF) 257 Page - Texas Instruments

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