STAC9752A datasheet(40/106 Pages) IDT

40 / 106 page

STAC9752A/9753A

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

PC AUDIO

IDT™

STAC9752A/9753A

V 1.5 1206

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

before attempting any register writes, or attempting to enable any audio stream, to avoid undesirable

audio artifacts.

Prior to any attempts at putting an AC‘97 CODEC into operation, the AC‘97 Controller should poll the

first bit in the AC-Link input frame (SDATA_IN slot 0, bit 15) for an indication that CODEC has gone

“CODEC Ready”. Once an AC‘97 CODEC is sampled “CODEC Ready”1 then the next 12 bit posi-

tions sampled by the AC‘97 Controller indicate which of the corresponding 12 time slots are

assigned to input data streams, and that they contain valid data.

5.4.2.

Slot 1: Status Address Port / SLOTREQ Signaling Bits

5.4.2.1.

Status Address Port

The status port is used to monitor status for the STAC9752A/9753A functions including, but not lim-

ited to, mixer settings and power management. AC-Link input frame slot 1’s stream echoes the con-

trol register index, for historical reference, for the data to be returned in slot 2. (Assuming that slots 1

and 2 had been tagged “valid” by the AC‘97 CODEC during slot 0.

The first bit (MSB) generated by AC‘97 is always stuffed with a 0. The following 7 bit positions com-

municate the associated control register address, the next 10 bits support AC‘97’s variable sample

rate signaling protocol, and the trailing 2 bit positions are stuffed with 0s by AC‘97.

5.4.2.2.

SLOTREQ signaling bits

AC-Link input frame Slot #1, the Status Address Port, now delivers CODEC control register read

address and variable sample rate slot request flags for all output slots. Ten of the formerly reserved

least significant bits have been defined as data request flags for output slots 3-12.

The AC-Link input frame Slot 1 tag bit is independent of the bit 11-2 slot request field, and ONLY

indicates valid Status Address Port data (Control Register Index). The CODEC should only set

SDATA_IN tag bits for Slot 1 (Address) and Slot 2 (Data) to 1 when returning valid data from a previ-

ous register read. They should otherwise be set to 0. SLOTREQ bits have validity independent of the

Slot 1 tag bit.

1. There are several subsections within an AC‘97 CODEC that can independently go busy/ready. It is the responsibility

of the AC’97 Controller to probe more deeply into the AC‘97 CODEC’s register file to determine which subsections

are actually ready.

Table 9. Status Address Port Bit Assignments

Bit

Description

Comments

Reserved

Stuffed with 0s

18:12

Control Register Index

Echo of register index for which data is being returned

11:2

SLOTREQ

See Section5.4.2.2: page40

1:0

Reserved

Stuffed with 0s

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