STAC9752A datasheet(48/106 Pages) IDT

48 / 106 page

STAC9752A/9753A

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

PC AUDIO

IDT™

STAC9752A/9753A

V 1.5 1206

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

6.2.

SPDIF Digital Mux

The STAC9752A/9753A incorporates a digital output that supports SPDIF formats. A multiplexer

determines which of two digital input streams are used for the digital output conversion process.

These two streams include the PCM OUT data from the audio controller and the ADC recorded out-

put. The normal analog LINE_OUT signal can be converted to the SPDIF formats by using the inter-

nal ADC to record the “MIX” output, which is the combination of all analog and all digital sources. In

the case of digital controllers with support for four or more channels, the SPDIF output mode can be

used to support compressed 6-channel output streams for delivery to home theater systems. These

can be routed on alternate AC-Link slots to the SPDIF output, while the standard 2-channel output is

delivered as selected by bits D5 and D4 in Register 6E. If the digital controller supports six channels,

a SPDIF output with four analog channels can also be configured.

If the Digital Controller has independent DMA engines, SPDIF and Analog can be used simulta-

neously and independently.

6.3.

PC Beep Implementation

The STAC9752A/9753A offers two styles of PC BEEP, Analog and Digital. The digital PC BEEP is a

new feature added to the AC’97 Specification Rev 2.3. This style of PC BEEP will eventually replace

the Analog style, thus eliminating the need for a PC BEEP pin. Until this feature is widely accepted,

IDT will provide BOTH styles of PC BEEP. Both PC BEEP styles use Reg 0Ah. Additional informa-

tion about Reg0Ah can be found in Section7.1.5: page53.

6.3.1.

Analog PC Beep

PC Beep is active on power up and defaults to an un-muted state. The PC_BEEP input is routed

directly to the MONO_OUT, LINE_OUT and HP_OUT pins of the CODEC. Because the PC_BEEP

input drive is often a full scale digital signal, some resistive attenuation of the PC_BEEP input is rec-

ommended to keep the beep tone within reasonable volume levels. The user should mute this input

before using any other mixer input because the PC Beep input can contribute noise to the lineout

during normal operation. This style of PC BEEP is related to the AC’97 Specification Rev 2.2. To use

the analog PC BEEP, write a value of 00h to bits F[7:0](D[12:5]) to disable the Digital PC Beep gen-

eration. PV[3:0] (D[4:1]) controls the volume level from 0 to 45dB of attenuation in 3dB steps.

6.3.2.

Digital PC Beep

The Digital PC Beep uses the identical register as the Analog style, Reg 0Ah. This register controls

the level and frequency for the PC BEEP. The beep frequency is the result of dividing the 48 KHz

clock by 2 times the number specified in F[7:0] +2, allowing tones from 94Hz to 12KHz. A value of

00h written to bits F[7:0] disables the digital PC Beep generation and enables the analog style PC

BEEP . The volume control bits, PV[3:0] operate identically to the analog PC BEEP mode. Applying a

signal to the PC BEEP pin, pin 12, may cause the digital PC BEEP signal to become distorted or

inaudible. When using the digital PC BEEP feature, it is recommended to leave the PC BEEP input

pin unconnected or connected to analog ground through a capacitor. Connecting a capacitor from

the PC BEEP input pin to ground will create a more pleasing sound by changing the digital output to

a more sinusoidal signal.

STAC9752A Datasheet(PDF) 48 Page - Integrated Device Technology

STAC9752A Datasheet(HTML) 48 Page - Integrated Device Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL