STAC9752A datasheet(63/106 Pages) IDT

63 / 106 page

STAC9752A/9753A

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

PC AUDIO

IDT™

STAC9752A/9753A

V 1.5 1206

AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK

7.1.18.1.

Ready Status

The lower half of this register is read only status, a 1 indicating that each subsection is ready. Ready

is defined as the subsection's ability to perform in its nominal state. When this register is written, the

bit values that come in on AC-Link will have no effect on read-only bits 0-7.

When the AC-Link “CODEC Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1, it indicates that the

AC-Link and AC'97 control and status registers are in a fully operational state. The AC'97 controller

must further probe this PowerdownControl/Status Register to determine exactly which subsections,

if any, are ready. When this register is written, the bit values that come in on AC-Link will have no

effect on read-only bits 0-7.

7.1.18.2.

Powerdown Controls

The STAC9752A/9753A is capable of operating at reduced power when no activity is required. The

power-down state is controlled by the Powerdown Register (26h). See the section “Low Power

Modes” for more information.

7.1.18.3.

External Amplifier Power Down Control Output

The EAPD bit (bit 15 of the Powerdown Control/Status Register (Index 26h)), directly controls the

EAPD output, pin 45, and produces a logical 1 when this bit is set to logic high. This function is used

to control an external audio amplifier power-down. EAPD= 0 places approximately 0V on the output

pin, enabling an external audio amplifier. EAPD=1 places approximately DVdd on the output pin,

disabling the external audio amplifier. Audio amplifiers that operate with reverse polarity will likely

require an external inverter to maintain software driver compatibility.

EAPD can also act as a GPIO. See Section 7.4.11: page82. The GPIO controls in Section 7.2:

page68 have no effect on EAPD.

7.1.19.

Extended Audio ID (28h)

Default: 0A05h

The Extended Audio ID register is a read-only register except for bits D4 and D5. ID1 and ID0 echo

the configuration of the CODEC as defined by the programming of pins 45 and 46 externally. “00”

returned defines the CODEC as the primary CODEC, while any other code identifies the CODEC as

DAC

Read Only ---- DAC Status

1 = DAC ready to playback

ADC

Read Only ---- ADC Status

1 = ADC ready to record

D15

D14

D13

D12

D11

D10

ID1

ID0

Reserved

AMAP

RSVD

Reserved

DSA1

DSA0

RESVD

SPDIF

RSVD

VRA

Bit(s)

Reset Value

Name

Description

STAC9752A Datasheet(PDF) 63 Page - Integrated Device Technology

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