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STAC9752A Datasheet(PDF) 67 Page - Integrated Device Technology

Part # STAC9752A
Description  AC??7 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
PDF  106 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

STAC9752A Datasheet(HTML) 67 Page - Integrated Device Technology

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STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
PC AUDIO
IDT™
67
STAC9752A/9753A
V 1.5 1206
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
7.1.21.
PCM DAC Rate Registers (2Ch and 32h)
The internal sample rate for the DACs and ADCs are controlled by the value in these read/write reg-
isters that contain a 16-bit unsigned value between 0 and 65535 representing the conversion rate in
Hertz (Hz). In VRA mode (register 2Ah, bit D0= 1), if the value written to these registers is sup-
ported, that value will be echoed back when read, otherwise the closest (higher in the case of a tie)
sample rate is supported and returned. Per PC 99/PC2001 specification, independent sample
rates are supported for record and playback.
Whenever VRA is set to 0 the PCM rate registers (2Ch and 32h) will be loaded with BB80h (48KHz).
If VRA is set to a 0, any write to this address will be ignored and the rate remains at 48KHz.
7.1.22.
PCM DAC Rate (2Ch)
Default: BB80h (see table21: page67)
7.1.23.
PCM LR ADC Rate (32h)
Default: BB80h (see table21: page67)
Table 21. Hardware Supported Sample Rates
Sample Rate
SR15-SR0 Value
8 KHz
1F40h
11.025 KHz
2B11h
16 KHz
3E80h
22.05 KHz
5622h
32 KHz
7D00h
44.1 KHz
AC44h
48 KHz
BB80h
D15
D14
D13
D12
D11
D10
D9
D8
SR15
SR14
SR13
SR12
SR11
SR10
SR9
SR8
D7
D6
D5
D4
D3
D2
D1
D0
SR7
SR6
SR5
SR4
SR3
SR2
SR1
SR0
D15
D14
D13
D12
D11
D10
D9
D8
SR15
SR14
SR13
SR12
SR11
SR10
SR9
SR8
D7
D6
D5
D4
D3
D2
D1
D0
SR7
SR6
SR5
SR4
SR3
SR2
SR1
SR0



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