PM7346 datasheet(247/419 Pages) PMC

247 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 226

Bit

Type

Function

Default

Bit 7

OOCDV

Bit 6

LCDV

Bit 5

Unused

Bit 4

OOCDI

Bit 3

CHCSI

Bit 2

UHCSI

Bit 1

FOVRI

Bit 0

LCDI

LCDI:

The LCDI bit is set high when there is a change in the loss of cell delineation

(LCD) state. This bit is reset immediately after a read to this register.

FOVRI:

The FOVRI bit is set to logic 1 when a FIFO overrun occurs. This bit is reset

immediately after a read to this register. No further FIFO overrun indications

will occur until the condition which caused the original overrun has cleared. In

the case where continuous FIFO overruns are occurring, only a single

overrun indication (FOVRI -> ‘1’) will be recorded until the overruns cease.

UHCSI:

The UHCSI bit is set high when an uncorrected HCS error is detected. This

bit is reset immediately after a read to this register.

CHCSI:

The CHCSI bit is set high when a corrected HCS error is detected. This bit is

reset immediately after a read to this register.

OOCDI:

The OOCDI bit is set high when the RXCP-50 enters or exits the SYNC state.

The OOCDV bit indicates whether the RXCP-50 is in the SYNC state or not.

The OOCDI bit is reset immediately after a read to this register.

PM7346 Datasheet(PDF) 247 Page - PMC-Sierra, Inc

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