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PM7346 Datasheet(PDF) 267 Page - PMC-Sierra, Inc |
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PM7346 Datasheet(HTML) 267 Page - PMC-Sierra, Inc |
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267 / 419 page ![]() PM7346 S/UNI-QJET DATASHEET PMC-960835 ISSUE 6 SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 246 Register 082H, 182H, 282H, 382H: TXCP-50 Cell Count Status Bit Type Function Default Bit 7 R/W XFERE 0 Bit 6 R XFERI X Bit 5 R OVR X Bit 4 Unused X Bit 3 R/W Reserved 1 Bit 2 R/W Reserved 0 Bit 1 R/W Reserved 0 Bit 0 R/W Reserved 0 Reserved: These bits should be set to their default values for proper operation XFERI: The XFERI bit indicates that a transfer of Transmit Cell Count data has occurred. A logic 1 in this bit position indicates that the Transmit Cell Count registers have been updated. This update is initiated by writing to one of the Transmit Cell Count register locations or to the S/UNI-QJET Identification, Master Reset, and Global Monitor Update register. XFERI is set to logic 0 when this register is read. OVR: The OVR bit is the overrun status of the Transmit Cell Count registers. A logic 1 in this bit position indicates that a previous transfer (indicated by XFERI being logic 1) has not been acknowledged before the next accumulation interval has occurred and that the contents of the Transmit Cell Count registers have been overwritten. OVR is set to logic 0 when this register is read. XFERE: The XFERE bit enables the generation of an interrupt when an accumulation interval is completed and new values are stored in the Transmit Cell Count registers. When XFERE is set to logic 1, the interrupt is enabled. |
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