Electronic Components Datasheet Search
  English  ▼

X  

PM7346 Datasheet(PDF) 185 Page - PMC-Sierra, Inc

Part # PM7346
Description  SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PDF  419 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7346 Datasheet(HTML) 185 Page - PMC-Sierra, Inc

Back Button PM7346 Datasheet HTML 181Page - PMC-Sierra, Inc PM7346 Datasheet HTML 182Page - PMC-Sierra, Inc PM7346 Datasheet HTML 183Page - PMC-Sierra, Inc PM7346 Datasheet HTML 184Page - PMC-Sierra, Inc PM7346 Datasheet HTML 185Page - PMC-Sierra, Inc PM7346 Datasheet HTML 186Page - PMC-Sierra, Inc PM7346 Datasheet HTML 187Page - PMC-Sierra, Inc PM7346 Datasheet HTML 188Page - PMC-Sierra, Inc PM7346 Datasheet HTML 189Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 185 / 419 page
background image
PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 164
Register 039H, 139H, 239H, 339H: E3 FRMR Maintenance Options
Bit
Type
Function
Default
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
R/W
WORDBIP
0
Bit 4
R/W
Reserved
0
Bit 3
R/W
WORDERR
0
Bit 2
R/W
PYLD&JUST
0
Bit 1
R/W
FERFDET
0
Bit 0
R/W
TMARKDET
0
TMARKDET:
The TMARKDET bit determines the persistency check performed on the
Timing Marker bit (bit 8 of the G.832 Maintenance and Adaptation byte).
When TMARKDET is logic 1, the Timing Marker bit must be in the same state
for 5 consecutive frames before the TIMEMK status is changed to that state.
When TMARKDET is logic 0, the Timing Marker bit must be in the same state
for 3 consecutive frames. When a framing mode other than G.832 is
selected, the setting of the TMARKDET bit is ignored.
FERFDET:
The FERFDET bit determines the persistency check performed on the Far
End Receive Failure (FERF) bit (bit 1 of the G.832 Maintenance and
Adaptation byte) or on the Remote Alarm indication (RAI) bit (bit 11 of the
frame in G.751 mode). When FERFDET is logic 1, the FERF, or RAI, bit must
be in the same state for 5 consecutive frames before the FERF/RAI status is
changed to that state. When FERFDET is logic 0, the FERF, or RAI, bit must
be in the same state for 3 consecutive frames.
PYLD&JUST:
The PYLD&JUST bit selects whether the justification service bits and the
tributary justification bits in framing mode G.751 is indicated as overhead or
payload. When PYLD&JUST is logic 1, the justification service bits and the
tributary justification bits are indicated as payload to the SPLR. When
PYLD&JUST is logic 0, the justification service and tributary justification bits



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com