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TMPR3916 Datasheet(PDF) 177 Page - Toshiba Semiconductor |
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TMPR3916 Datasheet(HTML) 177 Page - Toshiba Semiconductor |
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177 / 225 page ![]() Chapter 10 Asynchronous Serial Interface (UART) Preliminary 10-2 BAUD RATE GENERATOR SERIAL IN / PARALLEL OUT (SIPO) and RX FIFO SystemBusData(31:0) DataToSystemBus(7:0) STATUS REGISTER TX FIFO and PARALLEL IN / SERIAL OUT (PISO) SerialDataIn RTS_n CTS_n SerialDataOut SerialClockOut DataFromSystemBus(7:0) TX FIFO Status RX FIFO Status & RX Error Flags Control Bus SystemBusControl Figure 10.1.1 UART Block Diagram 10.1.2 Data Format There are several data formats, which can be applied for serial I/O, these are summarized here: Data length 7 – 8 – 9 bits (9-bit data is practicable for a multi controller system) Stop bit 1 – 2 bits Parity bit provided/not provided Parity system even/odd Start bit 1-bit fixed data format MSB/LSB first (switchable by register settings) Please note that sending a parity bit is not allowed for address transmission in a multi-controller system, Figure 10.1.2 and Figure 10.1.3 show examples for these data formats: |
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