7630 datasheet(38/238 Pages) RENESAS

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7630 Group User’s Manual

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TIMERS

The 7630 group has five timers: two 16-bit timers and three 8-bit tim-

ers . All these timers will be described in detail below.

16-bit Timers

Timers X and Y are 16-bit timers with multiple operating modes.

Please refer to Fig. 19.

Fig. 19 Block diagram of timers X and Y (

φ is internal system clock)

Timer X

Timer X is a 16-bit timer with a 16-bit reload latch supporting the fol-

lowing operating modes:

(1) Timer mode

(2) Bi-phase counter mode

(3) Event counter mode

(4) Pulse width measurement mode

These modes can be selected by the timer X mode register (TXM). In

the timer- and pulse width measurement mode, the timer’s count

source can be selected by the timer X count source selection bits of

the timer Y mode register (TYM). Please refer to the Figures below

for the TXM and TYM bit assignment.

On read or write access to timer X, note that the high-order and low-

order bytes must be accessed in the specific order.

Write method

When writing to the timer X, write the low-order byte first. The data

written is stored in a temporary register which is assigned to the

same address as TXL. Next, write the high-order byte. When this is

finished, the data is placed in the timer X high-order reload latch and

the low-order byte is transferred from its temporary register to the

timer X low-order reload latch. Depending on the timer X write control

bit, the latch contents are reloaded to the timer immediately (write

control bit = “0”) or on the next timer underflow (write control bit = “1”).

Read method

When reading the timer X, read the high-order byte first. This causes

the timer X high- and low-order bytes to be transferred to temporary

registers being assigned to the same addresses as TXH and TXL.

Next, read the low-order byte which is read from the temporary regis-

ter. This method assures the correct timer value can be read during

the timer count operation.

Timer X count stop control

Regardless of the actual operating mode, timer X can be stopped by

setting the timer X count stop bit (bit 7 of the timer X mode register) to

“1”.

TYM5, 4=“11”

TYM7

1/16

1/64

1/128

TYM1,0

P13/TX0

P14/CNTR0

Edge detector

Sign generator

TXL counter (8)

TXH latch (8)

TXH counter (8)

TXM7

TXL latch (8)

Count

direction

control

TXM5, 4

Down

“00”, “10”,

“11”

“01”

“00”, “11”

“01”

“10”

TXM6

TXM5, 4=“11”

TX interrupt request

CNTR0 interrupt request

1/8

1/32

1/64

P15/CNTR1

TYM6

TYM5, 4

“10”

“0x”, “11”

TYL counter (8)

TYH latch (8)

TYH counter (8)

TYL latch (8)

TY interrupt request

CNTR1 interrupt request

Rising edge detector

Falling edge detector

TYM5, 4=“01”

TYM5, 4

“11”

“0x”, “10”

“1”

“0”

TYM3, 2

1/4

1/2

TXM5,4

“00”

“01”

“10”

“11”

“00”

“01”

“10”

“11”

“0”

“1”

TIMERS

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