7630 datasheet(10/238 Pages) RENESAS

10 / 238 page

List of figures

7630 GROUP USER’S MANUAL

List of figures

CHAPTER 1. HARDWARE

Fig. 1 Pin configuration of M37630M4T-XXXFP .................................................................. 1-2

Fig. 2 Functional block diagram ............................................................................................. 1-3

Fig. 3 Part numbering ............................................................................................................. 1-5

Fig. 4 Memory expansion plan ............................................................................................... 1-6

Fig. 5 740 Family CPU register structure ............................................................................ 1-7

Fig. 6 Register push and pop at interrupt generation and subroutine call ..................... 1-8

Fig. 7 Structure of CPU mode register ............................................................................... 1-10

Fig. 8 Memory map diagram ................................................................................................ 1-11

Fig. 9 Memory map of special register (SFR) ................................................................... 1-12

Fig. 10 Structure of Port- and Port direction registers ..................................................... 1-13

Fig. 11 Structure of Port I/Os (1) ........................................................................................ 1-13

Fig. 12 Structure of Port I/Os (2) ........................................................................................ 1-14

Fig. 13 Structure of Port pull-up/down control registers .................................................. 1-15

Fig. 14 Structure of Polarity control register ...................................................................... 1-15

Fig. 15 Interrupt control ........................................................................................................ 1-19

Fig. 16 Structure of Interrupt polarity selection register ................................................... 1-19

Fig. 17 Structure of Interrupt request and control registers A, B and C ....................... 1-20

Fig. 18 Block diagram of key-on wake-up circuit .............................................................. 1-21

Fig. 19 Block diagram of timers X and Y .......................................................................... 1-22

Fig. 20 Structure of Timer X mode register ....................................................................... 1-23

Fig. 21 Structure of Timer Y mode register ....................................................................... 1-24

Fig. 22 Timer X bi-phase counter mode operation ........................................................... 1-25

Fig. 23 Block diagram of timers 1 to 3 .............................................................................. 1-26

Fig. 24 Timer 123 mode register configulation .................................................................. 1-27

Fig. 25 Block diagram of clock syncronous SI/O .............................................................. 1-28

Fig. 26 Timing of clock syncronous SI/O function ............................................................ 1-28

Fig. 27 Structure of Serial I/O control register .................................................................. 1-29

Fig. 28 Block diagram of UART ........................................................................................... 1-30

Fig. 29 Structure of UART mode register .......................................................................... 1-31

Fig. 30 Structure of UART control register ........................................................................ 1-31

Fig. 31 Structure of UART status register .......................................................................... 1-32

Fig. 32 Bit time of CAN module .......................................................................................... 1-33

Fig. 33 Block diagram of CAN module ............................................................................... 1-33

Fig. 34 Structure of CAN transmit control register ........................................................... 1-34

Fig. 35 Structure of CAN receive control register ............................................................. 1-34

Fig. 36 Structure of CAN transmit abort request register ................................................ 1-35

Fig. 37 Structure of CAN bus timing control register 1 ................................................... 1-35

Fig. 38 Structure of CAN bus timing control register 2 ................................................... 1-36

Fig. 39 Structure of CAN mask and code registers ......................................................... 1-36

Fig. 40 Structure of CAN transmission and reception buffer registers .......................... 1-37

Fig. 41 Block diagram of A-D converter ............................................................................. 1-38

Fig. 42 Structure of A-D control register ............................................................................ 1-39

Fig. 43 Block diagram of watchdog timer ........................................................................... 1-40

Fig. 44 Structure of watchdog timer register ..................................................................... 1-40

Fig. 45 Example of reset circuit ........................................................................................... 1-41

Fig. 46 Reset sequence ........................................................................................................ 1-41

Fig. 47 Internal status of microcomputer after reset ........................................................ 1-42

7630 Datasheet(PDF) 10 Page - Renesas Technology Corp

7630 Datasheet(HTML) 10 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL