7630 datasheet(6/238 Pages) RENESAS

6 / 238 page

BEFORE USING THIS USER’S MANUAL

This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,

such as hardware design or software development. Chapter 3 also includes necessary information for

systems denelopment. Be sure to refer to this chapter.

1. Organization

q CHAPTER 1 HARDWARE

This chapter describes features of the microcomputer and operation of each peripheral function.

q CHAPTER 2 APPLICATION

This chapter describes usage and application examples of peripheral functions, based mainly on

setting examples of related registers.

q CHAPTER 3 APPENDIX

This chapter includes necessary information for systems development using the microcomputer, electric

characteristics, a list of registers, the masking confirmation (mask ROM version), and mark specifications

which are to be submitted when ordering.

2. Structure of register

The figure of each register structure describes its functions, contents at reset, and attributes as follows :

CPU mode register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

Processor mode bits

b1 b0

0 0 : Single chip mode

0 1 : Not available

1 0 : Not available

1 1 : Not available

Stack page selection bit

0 : In page 0

1 : In page 1

Not used (“0” when read, don't write “1”.)

Internal clock selection bit

0 : f(XIN)/2 (high-speed mode)

1 : f(XIN)/8 (middle-speed mode)

Not used (“0” when read, don't write “1”.)

: Bit in which nothing is arranged

Note 1: Contents immediately after reset release

0 •••••• “0” at reset release

1 •••••• “1” at reset release

undefined •••••• Undefined at reset release

V •••••• Contents determined by option at reset release

Note 2: Bit attributes •••••• The attributes of control register bits are classified into 3 types : read-only, write-only

and read and write. In the figure, these attributes are represented as follows:

R •••••• Read

W •••••• Write

•••••• Read enabled

•••••• Write enabled

•••••• Read disabled

•••••• Write disabled

Bits

Contents immediately after reset release

Bit attributes

(Note 2)

(Note 1)

CPU mode register (CPUM) [Address : 000016]

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