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7630 Datasheet(PDF) 14 Page - Renesas Technology Corp |
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7630 Datasheet(HTML) 14 Page - Renesas Technology Corp |
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14 / 238 page ![]() List of figures 7630 GROUP USER’S MANUAL viii Fig. 3.4.10 Watchdog timer by software ............................................................................. 3-21 Fig. 3.5.1 Structure of CPU mode register ........................................................................ 3-22 Fig. 3.5.2 Structure of Interrupt request register A ........................................................... 3-22 Fig. 3.5.3 Structure of Interrupt request register B ........................................................... 3-23 Fig. 3.5.4 Structure of Interrupt request register C .......................................................... 3-23 Fig. 3.5.5 Structure of Interrupt control register A ............................................................ 3-24 Fig. 3.5.6 Structure of Interrupt control register B ............................................................ 3-24 Fig. 3.5.7 Structure of Interrupt control register C ............................................................ 3-25 Fig. 3.5.8 Structure of Port Pi register (i = 0, 1, 2, 3, 4) ............................................... 3-25 Fig. 3.5.9 Structure of Port Pi direction register (i = 0, 1, 2, 3, 4) ............................... 3-26 Fig. 3.5.10 Structure of Serial I/O shift register ................................................................ 3-26 Fig. 3.5.11 Structure of Serial I/O control register ............................................................ 3-27 Fig. 3.5.12 Structure of A-D conversion register ............................................................... 3-27 Fig. 3.5.13 Structure of A-D control register ...................................................................... 3-28 Fig. 3.5.14 Structure of Timer 1, Timer 3 .......................................................................... 3-28 Fig. 3.5.15 Structure of Timer 2 .......................................................................................... 3-29 Fig. 3.5.16 Structure of Timer 123 mode register ............................................................. 3-29 Fig. 3.5.17 Structure of Timer XL, Timer XH, Timer YL, Timer YH ............................... 3-30 Fig. 3.5.18 Structure of Timer X mode register ................................................................ 3-30 Fig. 3.5.19 Structure of Timer Y mode register ................................................................ 3-31 Fig. 3.5.20 Structure of UART mode register .................................................................... 3-31 Fig. 3.5.21 Structure of UART baud rate generator ......................................................... 3-32 Fig. 3.5.22 Structure of UART control register .................................................................. 3-32 Fig. 3.5.23 Structure of UART status register ................................................................... 3-33 Fig. 3.5.24 Structure of UART transmit buffer register 1, 2 ............................................ 3-33 Fig. 3.5.25 Structure of UART receive buffer register 1, 2 ............................................. 3-34 Fig. 3.5.26 Structure of Port Pi pull-up control register (i = 0, 2) .................................. 3-34 Fig. 3.5.27 Structure of Port P1 pull-up control register .................................................. 3-35 Fig. 3.5.28 Structure of Port P3 pull-up control register .................................................. 3-35 Fig. 3.5.29 Structure of Port P4 pull-up/down control register ........................................ 3-36 Fig. 3.5.30 Structure of Interrupt polarity selection register ............................................ 3-36 Fig. 3.5.31 Structure of Watchdog timer register .............................................................. 3-37 Fig. 3.5.32 Structure of Polarity control register ............................................................... 3-37 Fig. 3.5.33 Structure of CAN transmit control register ..................................................... 3-38 Fig. 3.5.34 Structure of CAN bus timing control register 1 ............................................. 3-38 Fig. 3.5.35 Structure of CAN bus timing control register 2 ............................................. 3-39 Fig. 3.5.36 Structure of CAN acceptance code register 0 ............................................... 3-39 Fig. 3.5.37 Structure of CAN acceptance code register 1 ............................................... 3-40 Fig. 3.5.38 Structure of CAN acceptance code register 2 ............................................... 3-40 Fig. 3.5.39 Structure of CAN acceptance code register 3 ............................................... 3-41 Fig. 3.5.40 Structure of CAN acceptance code register 4 ............................................... 3-41 Fig. 3.5.41 Structure of CAN acceptance mask register 0 .............................................. 3-42 Fig. 3.5.42 Structure of CAN acceptance mask register 1 .............................................. 3-42 Fig. 3.5.43 Structure of CAN acceptance mask register 2 .............................................. 3-43 Fig. 3.5.44 Structure of CAN acceptance mask register 3 .............................................. 3-43 Fig. 3.5.45 Structure of CAN acceptance mask regiater 4 .............................................. 3-44 Fig. 3.5.46 Structure of CAN receive control register ...................................................... 3-44 Fig. 3.5.47 Structure of CAN transmit abort register ........................................................ 3-45 Fig. 3.5.48 Structure of CAN transmit/receive buffer registers 0 .................................... 3-45 Fig. 3.5.49 Structure of CAN transmit/receive buffer registers 1 .................................... 3-46 Fig. 3.5.50 Structure of CAN transmit/receive buffer registers 2 .................................... 3-46 Fig. 3.5.51 Structure of CAN transmit/receive buffer registers 3 .................................... 3-47 Fig. 3.5.52 Structure of CAN transmit/receive buffer registers 4 .................................... 3-47 |
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