7630 datasheet(40/238 Pages) RENESAS

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7630 Group User’s Manual

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Fig. 21 Structure of timer Y mode register (

φ is internal system clock)

Operating Modes

(1) Timer mode

This mode is available with timer X and timer Y.

•

Count source

The count source for timer X and Y is the output of the corre-

sponding clock divider. The division ratio can be selected by the

timer Y mode register.

•

Operation

Both timers X and Y are down counters. On a timer underflow, the

corresponding timer interrupt request bit will be set to “1”, the con-

tents of the corresponding timer latches will be reloaded to the

counters and counting continues.

(2) Bi-phase counter mode (quadruplicate)

This mode is available with timer X only.

•

Count source

The count sources are P14/CNTR0 and the P13/TX0 pins.

•

Operation

Timer X will count both rising and falling edges on both input pins

(see above). Refer to Timer X bi-phase counter mode operation

for the timing chart of the bi-phase counter mode.

The count direction is determined by the edge polarity and level of

count source inputs and may change during the count operation.

Refer to the table below.

On a timer over- or underflow, the corresponding interrupt request

bit will be set to “1” and counting continues.

Timer X count source selection bits

b1 b0

00 :

φ divided by 4

01 :

φ divided by 16

10 :

φ divided by 64

11 :

φ divided by 128

Timer Y count source selection bits

b3 b2

00 :

φ divided by 2

01 :

φ divided by 8

10 :

φ divided by 32

11 :

φ divided by 64

Timer Y operation mode bits

b5 b4

0 0 : Timer mode

0 1 : Pulse period measurement mode

1 0 : Event counter mode

1 1 : H/L pulse width measurement mode

CNTR1 polarity selection bit

0 : For event counter mode, rising edge active

For interrupt request, falling edge active

For pulse period measurement mode, refer to falling edges

1 : For event counter mode, falling edge active

For interrupt request, rising edge active

For pulse period measurement mode, refer to rising edges

Timer Y stop control bit

0 : Timer counting

1 : Timer stopped

Timer Y mode register (address 001F16)

TYM

Table 6: Timer X count direction in Bi-phase counter mode

P13/TX0

P14/CNTR0

Count direction

↑ Edge

LUp

Down

↓ Edge

Down

HUp

↑ Edge

Down

HUp

↓ Edge

Down

TIMERS

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