7630 datasheet(97/238 Pages) RENESAS

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APPLICATION

2.3 Timers

2-31

7630 Group User’s Manual

Fig. 2.3.16 Setting of related registers [Measurement of pulse width]

CPUM

CPU mode register [Address: 000016]

Internal system clock selection bit :

φ = f(XIN) divided by 2

(high-speed mode)

Timer X mode bits : Pulse width measurement mode

TXL

Timer XL [Address: 001A16]

FF16

Set to “FFFF16” before counting a pulse.

(After being started, the timer decrements

with each input pulse.)

TXM

Timer X mode register [Address: 001E16]

Timer X data write control bit : Write to latch and timer

at the same time.

CNTR0 polarity selection bit : Measure the “H” period

Timer X stop control bit : Stop counting

(Clear this bit to “0” to start counting.)

TYM

Timer Y mode register [Address: 001F16]

Timer X count source selection bits :

φ divided by 16

Timer XH [Address: 001B16]

FF16

TXH

ICONB

Interrupt control register B [Address: 000616]

Timer X interrupt enable bit : Interrupt enabled

CNTR0 interrupt enable bit : Interrupt enabled

IREQB

Interrupt request register B [Address: 000316]

Timer X interrupt request bit

(This bit is set to “1” at underflow of Timer X.)

CNTR0 interrupt request bit

(This bit is set to “1” at the falling edge of the input signal of CNTR0 pin.)

P1D

Port P1 direction register [Address: 000B16]

P14 : Input mode

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