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PCM5310PAPR Datasheet(PDF) 41 Page - Texas Instruments |
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PCM5310PAPR Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 103 page ![]() REGISTER MAP PCM5310 www.ti.com ............................................................................................................................................................................................ SLES244 – FEBRUARY 2009 The mode control register map is shown in Table 30. Each register includes an index (or address) indicated by the IDX[6:0] bits. Table 30. Mode Control Register Map REG HEX DESCRIPTION B7 B6 B5 B4 B3 B2 B1 B0 01 01h Reset function MRST SRST RSV(1) RSV RSV RSV RSV RSV 08 08h GPIO pin output control RSV RSV RSV RSV RSV GPO3 GPO2 GPO1 09 09h GPIO PORT-1 selection RSV RSV RSV GSL1[4:0] 10 0Ah GPIO PORT-2 selection RSV RSV RSV GSL2[4:0] 11 0Bh GPIO PORT-3 selection RSV RSV RSV GSL3[4:0] 12 0Ch Not assigned RSV RSV RSV RSV RSV RSV RSV RSV 13 0Dh Headphone short-circuit protection enable/disable RSV SRCR SHCR SPDR RSV SRCL SHCL SPDL 14 0Eh Headphone short-circuit protection detect time RSV RSV SDTR[1:0] RSV RSV SDTL[1:0] Headphone short-circuit protection release time, auto 15 0Fh RSV SADR SRTR[1:0] RSV SADL SRTL[1:0] control 16 10h Headphone short-circuit protection status read RSV RSV RSV SSHR RSV RSV RSV SSHL 17 11h Power up/down (bias) PBIS RSV RSV RSV RSV PDCF[1:0] PDCS 18 12h Power up/down (analog), power up/down time RSV PABE PAFE PCOM RSV PDTM[2:0] 19 13h Mute control linked to AMUTE pin MD12 MD34 MHPR MHPL ML2R ML2L ML1R ML1L 20 14h Analog input mux selection for ADC12 RSV AX1R[2:0] RSV AX1L[2:0] 21 15h Analog input mux selection for ADC34 RSV AX2R[2:0] RSV AX2L[2:0] 22 16h Analog input gain control for ADC12 RSV RSV AG1R[1:0] RSV RSV AG1L[1:0] 23 17h Analog input gain control for ADC12 RSV RSV AG2R[1:0] RSV RSV AG2L[1:0] 24 18h Analog output mux selection for line output 1 AL1R[3:0] AL1L[3:0] 25 19h Analog output mux selection for line output 2 AL2R[3:0] AL2L[3:0] 26 1Ah Analog output mux selection for headphone output AHPR[3:0] AHPL[3:0] 27 1Bh Gain control for line output GL2R[1:0] GL2L[1:0] GL1R[1:0] GL1L[1:0] 28 1Ch 2.0 VRMS and 2.4 VRMS selection for line output RSV RSV RSV G242 RSV RSV RSV G241 29 1Dh Clock halt detection control RSV RSV RSV RSV RSV RSV ACTH CHDE 30 1Eh Headphone output volume control HUPE RSV HSUR HSUL RSV RSV RSV HZRS Headphone mute and volume level setting for 31 1Fh HMUL HVOL[6:0] R-channel Headphone mute and volume level setting for 32 20h HMUR HVOR[6:0] L-channel 33 21h System clock output disable RSV RSV SC6D SC5D SC4D RSV SC2D SC1D 34 22h LRCK and BCK output disable at master mode RSV RSV LB6D LB5D LB4D LB3D LB2D LB1D 35 23h Read internal flag RSV RD12FS[2:0] RHMR RHML RSV RHPI 36 24h Read internal flag RSV RD34FS[2:0] RDM4 RDM3 RDM2 RDM1 37 25h Read internal flag RSV RA12FS[2:0] RAM4 RAM3 RAM2 RAM1 38 26h Read internal flag RSV RA34FS[2:0] RDZ4 RDZ3 RDZ2 RDZ1 39 27h Read internal flag CGLD RSV RHZR RHZL RAZ4 RAZ3 RAZ2 RAZ1 40 28h Digital attenuation and mute control for DAC12 D12E RSV DUC2 DUC1 RSV RSV RSV DZ12 41 29h Digital gain boost and digital soft mute for DAC12 RSV RSV RSV RSV DB12[1:0] DMU2 DMU1 42 2Ah Digital attenuation level setting for DAC12 L-channel DAT1[7:0] 43 2Bh Digital attenuation level setting for DAC12 R-channel DAT2[7:0] 44 2Ch Master/slave interface format for DAC12 DMS12[3:0] RSV RSV DFM12[1:0] 45 2Dh De-emphasis filter control for DAC12 RSV RSV RSV RSV DM12 RSV DF12[1:0] 46 2Eh Power up/down, oversampling rate control for DAC12 PD12 RSV OV12[1:0] ZR12 RSV RSV RSV (1) RSV = reserved (write '0' data). Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 41 Product Folder Link(s): PCM5310 |
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