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PCM5310PAPR Datasheet(PDF) 59 Page - Texas Instruments |
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PCM5310PAPR Datasheet(HTML) 59 Page - Texas Instruments |
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59 / 103 page  Registers 44 and 45 (2Ch and 2Dh) PCM5310 www.ti.com ............................................................................................................................................................................................ SLES244 – FEBRUARY 2009 Table 33. Digital Attenuation Level Setting for DAC12 (continued) DIGITAL ATT DIGITAL ATT DIGITAL ATT DIGITAL ATT DAT1[7:0] LEVEL DAT1[7:0] LEVEL DAT1[7:0] LEVEL DAT1[7:0] LEVEL DAT2[7:0] SETTING DAT2[7:0] SETTING DAT2[7:0] SETTING DAT2[7:0] SETTING 1101 1110 DE –16.5 dB 1010 1011 AB –42 dB 0111 1000 78 –67.5 dB 0100 0101 45 –93 dB 1101 1101 DD –17 dB 1010 1010 AA –42.5 dB 0111 0111 77 –68 dB 0100 0100 44 –93.5 dB 1101 1100 DC –17.5 dB 1010 1001 A9 –43 dB 0111 0110 76 –68.5 dB 0100 0011 43 –94 dB 1101 1011 DB –18 dB 1010 1000 A8 –43.5 dB 0111 0101 75 –69 dB 0100 0010 42 –94.5 dB 1101 1010 DA –18.5 dB 1010 0111 A7 –44 dB 0111 0100 74 –69.5 dB 0100 0001 41 –95 dB 1101 1001 D9 –19 dB 1010 0110 A6 –44.5 dB 0111 0011 73 –70 dB 0100 0000 40 –95.5 dB 1101 1000 D8 –19.5 dB 1010 0101 A5 –45 dB 0111 0010 72 –70.5 dB 0011 1111 3F –96 dB 1101 0111 D7 –20 dB 1010 0100 A4 –45.5 dB 0111 0001 71 –71 dB 0011 1110 3E –96.5 dB 1101 0110 D6 –20.5 dB 1010 0011 A3 –46 dB 0111 0000 70 –71.5 dB 0011 1101 3D –97 dB 1101 0101 D5 –21 dB 1010 0010 A2 –46.5 dB 0110 1111 6F –72 dB 0011 1100 3C –97.5 dB 1101 0100 D4 –21.5 dB 1010 0001 A1 –47 dB 0110 1110 6E –72.5 dB 0011 1011 3B –98 dB 1101 0011 D3 –22 dB 1010 0000 A0 –47.5 dB 0110 1101 6D –73 dB 0011 1010 3A –98.5 dB 1101 0010 D2 –22.5 dB 1001 1111 9F –48 dB 0110 1100 6C –73.5 dB 0011 1001 39 –99 dB 1101 0001 D1 –23 dB 1001 1110 9E –48.5 dB 0110 1011 6B –74 dB 0011 1000 38 –99.5 dB 1101 0000 D0 –23.5 dB 1001 1101 9D –49 dB 0110 1010 6A –74.5 dB 0011 0111 37 –100 dB 1100 1111 CF –24 dB 1001 1100 9C –49.5 dB 0110 1001 69 –75 dB 0011 0110 36 1100 1110 CE –24.5 dB 1001 1011 9B –50 dB 0110 1000 68 –75.5 dB ⋮ ⋮ Mute 0000 0000 00 1100 1101 CD –25 dB 1001 1010 9A –50.5 dB 0110 0111 67 –76 dB REG HEX DESCRIPTION B7 B6 B5 B4 B3 B2 B1 B0 44 2Ch Master/slave interface format for DAC12 DMS12[3:0] RSV RSV DFM12[1:0] 45 2Dh De-emphasis filter control for DAC12 RSV RSV RSV RSV DM12 RSV DF12[1:0] DMS12[3:0]: Master/Slave Audio Interface Setting for DAC12 These bits set the master or slave mode. DAC12 receives LRCK and BCK from PORT-1, PORT-2, PORT-3, PORT-4, PORT-5 or PORT-6 in slave mode, and generates LRCK and BCK from SCK in master mode. Default value: 1000 MASTER/SLAVE AUDIO INTERFACE SETTING FOR MASTER/SLAVE AUDIO INTERFACE SETTING FOR DMS12[3:0] DAC12 DMS12[3:0] DAC12 0000 Reserved 1000 Slave and system clock fS auto-detect mode (default) 0001 Master and system clock 768 fS 1001 Slave and system clock 768 fS 0010 Master and system clock 512 fS 1010 Slave and system clock 512 fS 0011 Master and system clock 384 fS 1011 Slave and system clock 384 fS 0100 Master and system clock 256 fS 1100 Slave and system clock 256 fS 0101 Master and system clock 192 fS 1101 Slave and system clock 192 fS 0110 Master and system clock 128 fS 1110 Slave and system clock 128 fS 0111 Reserved 1111 Reserved Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 59 Product Folder Link(s): PCM5310 |
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