G35 datasheet(33/351 Pages) INTEL

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Signal Description

Datasheet

Signal Name

Type

Description

HLOCK#

I/O

GTL+

Host Lock: All processor bus cycles sampled with the assertion

of HLOCK# and HADS#, until the negation of HLOCK#, must be

atomic, i.e. no DMI or PCI Express* Graphics accesses to DRAM

are allowed when HLOCK# is asserted by the processor.

HREQ[4:0]#

I/O

GTL+

Host Request Command: Defines the attributes of the

request. HREQ[4:0]# are transferred at 2x rate. Asserted by the

requesting agent during both halves of Request Phase. In the

first half, the signals define the transaction type to a level of

detail that is sufficient to begin a snoop request. In the second

half, the signals carry additional information to define the

complete transaction type.

HTRDY#

GTL+

Host Target Ready: Indicates that the target of the processor

transaction is able to enter the data transfer phase.

HRS[2:0]#

GTL+

Response Signals: These signals indicate the type of response

according to the following table.

Encoding

Response Type

000

Idle state

001

Retry response

010

Deferred response

011

Reserved(not driven by GMCH)

100

Hard Failure(not driven by GMCH)

101

No data response

110

Implicit Writeback

111

Normal data response

BSEL[2:0]

CMOS

Bus Speed Select: At the de-assertion of RSTIN#, the value

sampled on these pins determines the expected frequency of the

bus.

HRCOMP

I/O

CMOS

Host RCOMP: Used to calibrate the Host GTL+ I/O buffers.

This signal is powered by the Host Interface termination rail

(VTT).

HSCOMP

I/O

CMOS

Slew Rate Compensation: Compensation for the Host

Interface.

HSCOMP#

I/O

Slew Rate Compensation: Compensation for the Host

Interface for falling edges.

HSWING

Host Voltage Swing: This signal provides the reference voltage

used by FSB RCOMP circuits. HSWING is used for the signals

handled by HRCOMP.

HDVREF

Host Reference Voltage: Voltage input for the Data signals of

the Host GTL interface.

HACCVREF

Host Reference Voltage: Voltage input for the Address signals

of the Host GTL interface.

G35 Datasheet(PDF) 33 Page - Intel Corporation

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