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MSP430F5259 Datasheet(PDF) 26 Page - Texas Instruments

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Part # MSP430F5259
Description  MSP430F525x Mixed Signal Microcontroller
PDF  107 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP430F5259 Datasheet(HTML) 26 Page - Texas Instruments

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MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256
MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252
SLAS903A – MAY 2013 – REVISED JULY 2013
www.ti.com
System Module (SYS) (Link to user's guide)
The SYS module handles many of the system functions within the device. These include power-on reset (POR)
and power-up clear (PUC) handling, NMI source selection and management, reset interrupt vector generators,
bootstrap loader (BSL) entry mechanisms, and configuration management (device descriptors). It also includes a
data exchange mechanism when using JTAG that is called a JTAG mailbox and that can be used in the
application.
Table 13. System Module Interrupt Vector Registers
INTERRUPT VECTOR REGISTER
ADDRESS
INTERRUPT EVENT
VALUE
PRIORITY
019Eh
No interrupt pending
00h
Brownout (BOR)
02h
Highest
RST/NMI (BOR)
04h
PMMSWBOR (BOR)
06h
Wakeup from LPMx.5
08h
Security violation (BOR)
0Ah
SVSL (POR)
0Ch
SVSH (POR)
0Eh
SVML_OVP (POR)
10h
SYSRSTIV, System Reset
SVMH_OVP (POR)
12h
PMMSWPOR (POR)
14h
WDT timeout (PUC)
16h
WDT password violation (PUC)
18h
KEYV flash password violation (PUC)
1Ah
Reserved
1Ch
Peripheral area fetch (PUC)
1Eh
PMM password violation (PUC)
20h
Reserved
22h to 3Eh
Lowest
019Ch
No interrupt pending
00h
SVMLIFG
02h
Highest
SVMHIFG
04h
SVSMLDLYIFG
06h
SVSMHDLYIFG
08h
SYSSNIV, System NMI
VMAIFG
0Ah
JMBINIFG
0Ch
JMBOUTIFG
0Eh
SVMLVLRIFG
10h
SVMHVLRIFG
12h
Reserved
14h to 1Eh
Lowest
019Ah
No interrupt pending
00h
NMIFG
02h
Highest
OFIFG
04h
SYSUNIV, User NMI
ACCVIFG
06h
Reserved
08h
Reserved
0Ah to 1Eh
Lowest
26
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Copyright © 2013, Texas Instruments Incorporated



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