MSP430F5259 datasheet(8/107 Pages) TI1

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MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256

MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252

SLAS903A – MAY 2013 – REVISED JULY 2013

www.ti.com

Table 3. Terminal Functions

TERMINAL

NO.

I/O(1)

DESCRIPTION

NAME

RGC

ZQE

YFF

General-purpose digital I/O with port interrupt

P6.4/CB4/A4

I/O

Comparator_B input CB4

Analog input A4 – ADC (not available on all device types)

General-purpose digital I/O with port interrupt

P6.5/CB5/A5

I/O

Comparator_B input CB5

Analog input A5 – ADC (not available on all device types)

General-purpose digital I/O with port interrupt

P6.6/CB6/A6

I/O

Comparator_B input CB6

Analog input A6 – ADC (not available on all device types)

General-purpose digital I/O with port interrupt

P6.7/CB7/A7

I/O

Comparator_B input CB7

Analog input A7 – ADC (not available on all device types)

General-purpose digital I/O

Analog input A8 – ADC (not available on all device types)

P5.0/A8/VeREF+

I/O

Input for an external reference voltage to the ADC (not available on all device

types)

General-purpose digital I/O

Analog input A9 – ADC (not available on all device types)

P5.1/A9/VeREF-

I/O

Negative terminal for the ADC's reference voltage for an external applied

reference voltage (not available on all device types)

AVCC

Analog power supply

General-purpose digital I/O

P5.4/XIN

I/O

Input terminal for crystal oscillator XT1(2)

General-purpose digital I/O

P5.5/XOUT

I/O

Output terminal of crystal oscillator XT1

AVSS

Analog ground supply

DVCC

Digital power supply

DVSS

Digital ground supply

Regulated core power supply output (internal use only, no external current

VCORE(3)

loading)

General-purpose digital I/O with port interrupt

P1.0/TA0CLK/ACLK(4)

I/O

TA0 clock signal TA0CLK input

ACLK output (divided by 1, 2, 4, 8, 16, or 32)

General-purpose digital I/O with port interrupt

P1.1/TA0.0(4)

I/O

TA0 CCR0 capture: CCI0A input, compare: Out0 output

General-purpose digital I/O with port interrupt

P1.2/TA0.1(4)

I/O

TA0 CCR1 capture: CCI1A input, compare: Out1 output

General-purpose digital I/O with port interrupt

P1.3/TA0.2(4)

I/O

TA0 CCR2 capture: CCI2A input, compare: Out2 output

(1)

I = input, O = output, N/A = not available

(2)

When in crystal bypass mode, XIN can be configured so that it can support an input digital waveform with swing levels from DVSS to

DVCC or DVSS to DVIO. In this case, it is required that the pin be configured properly for the intended input swing.

(3)

VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended

capacitor value, CVCORE.

(4)

This pin function is supplied by DVIO. See Electrical Characteristics for input and output requirements.

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