MSP430F5259 datasheet(10/107 Pages) TI1

10 / 107 page

MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256

MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252

SLAS903A – MAY 2013 – REVISED JULY 2013

www.ti.com

Table 3. Terminal Functions (continued)

TERMINAL

NO.

I/O(1)

DESCRIPTION

NAME

RGC

ZQE

YFF

General-purpose digital I/O

Clock signal input – USCI_B0 SPI slave mode

P3.2/UCB0CLK/UCA0STE(5)

I/O

Clock signal output – USCI_B0 SPI master mode

Slave transmit enable – USCI_A0 SPI mode

General-purpose digital I/O

P3.3/UCA0TXD/UCA0SIMO (5)

I/O

Transmit data – USCI_A0 UART mode

Slave in, master out – USCI_A0 SPI mode

General-purpose digital I/O

P3.4/UCA0RXD/UCA0SOMI(5)

I/O

Receive data – USCI_A0 UART mode

Slave out, master in – USCI_A0 SPI mode

DVSS

Digital ground supply

DVIO(6)

Digital I/O power supply

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.0/PM_UCB1STE/

I/O

Default mapping: Slave transmit enable – USCI_B1 SPI mode

PM_UCA1CLK(5)

Default mapping: Clock signal input – USCI_A1 SPI slave mode

Default mapping: Clock signal output – USCI_A1 SPI master mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.1/PM_UCB1SIMO/

I/O

PM_UCB1SDA(5)

Default mapping: Slave in, master out – USCI_B1 SPI mode

Default mapping: I2C data – USCI_B1 I2C mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.2/PM_UCB1SOMI/

I/O

PM_UCB1SCL(7)

Default mapping: Slave out, master in – USCI_B1 SPI mode

Default mapping: I2C clock – USCI_B1 I2C mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.3/PM_UCB1CLK/

I/O

Default mapping: Clock signal input – USCI_B1 SPI slave mode

PM_UCA1STE(7)

Default mapping: Clock signal output – USCI_B1 SPI master mode

Default mapping: Slave transmit enable – USCI_A1 SPI mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.4/PM_UCA1TXD/

I/O

PM_UCA1SIMO(7)

Default mapping: Transmit data – USCI_A1 UART mode

Default mapping: Slave in, master out – USCI_A1 SPI mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.5/PM_UCA1RXD/

I/O

PM_UCA1SOMI(7)

Default mapping: Receive data – USCI_A1 UART mode

Default mapping: Slave out, master in – USCI_A1 SPI mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.6/PM_UCA3TXD/

I/O

PM_UCA3SIMO(7)

Default mapping: Transmit data – USCI_A3 UART mode

Default mapping: Slave in, master out – USCI_A3 SPI mode

General-purpose digital I/O with reconfigurable port mapping secondary

function

P4.7/PM_UCA3RXD/

I/O

PM_UCA3SOMI(7)

Default mapping: Receive data – USCI_A3 UART mode

Default mapping: Slave out, master in – USCI_A3 SPI mode

(6)

The voltage on DVIO is not supervised or monitored.

(7)

This pin function is supplied by DVIO. See Electrical Characteristics for input and output requirements.

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