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MSP430F5259 Datasheet(PDF) 55 Page - Texas Instruments |
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MSP430F5259 Datasheet(HTML) 55 Page - Texas Instruments |
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55 / 107 page ![]() MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903A – MAY 2013 – REVISED JULY 2013 Crystal Oscillator, XT1, Low-Frequency Mode (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 1, 0.075 TA = 25°C fOSC = 32768 Hz, XTS = 0, Differential XT1 oscillator crystal ΔIDVCC.LF current consumption from lowest XT1BYPASS = 0, XT1DRIVEx = 2, 3.0 V 0.170 µA drive setting, LF mode TA = 25°C fOSC = 32768 Hz, XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 3, 0.290 TA = 25°C XT1 oscillator crystal frequency, fXT1,LF0 XTS = 0, XT1BYPASS = 0 32768 Hz LF mode XTS = 0, XT1BYPASS = 1(2) (3) XT1 oscillator logic-level square- fXT1,LF,SW 10 32.768 50 kHz wave input frequency, LF mode XT1BYPASSLV = 0 or 1 XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 0, 210 fXT1,LF = 32768 Hz, CL,eff = 6 pF Oscillation allowance for OALF k Ω LF crystals(4) XTS = 0, XT1BYPASS = 0, XT1DRIVEx = 1, 300 fXT1,LF = 32768 Hz, CL,eff = 12 pF XTS = 0, XCAPx = 0(6) 2 XTS = 0, XCAPx = 1 5.5 Integrated effective load CL,eff pF capacitance, LF mode(5) XTS = 0, XCAPx = 2 8.5 XTS = 0, XCAPx = 3 12.0 XTS = 0, Measured at ACLK, Duty cycle, LF mode 30 70 % fXT1,LF = 32768 Hz XTS = 0, Oscillator fault frequency, fFault,LF XT1BYPASS = 1(8), 10 10000 Hz LF mode(7) XT1BYPASSLV = 0 or 1 (1) To improve EMI on the XT1 oscillator, the following guidelines should be observed. (a) Keep the trace between the device and the crystal as short as possible. (b) Design a good ground plane around the oscillator pins. (c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT. (d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins. (e) Use assembly materials and techniques that avoid any parasitic load on the oscillator XIN and XOUT pins. (f) If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins. (2) When XT1BYPASS is set, XT1 circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in the Schmitt-Trigger Inputs section of this datasheet. When in crystal bypass mode, XIN can be configured so that it can support an input digital waveform with swing levels from DVSS to DVCC (XT1BYPASSLV = 0) or DVSS to DVIO (XT1BYPASSLV = 1). In this case, it is required that the pin be configured properly for the intended input swing. (3) Maximum frequency of operation of the entire device cannot be exceeded. (4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the XT1DRIVEx settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following guidelines, but each application should be evaluated based on the actual crystal selected: (a) For XT1DRIVEx = 0, CL,eff ≤ 6 pF (b) For XT1DRIVEx = 1, 6 pF ≤ CL,eff ≤ 9 pF (c) For XT1DRIVEx = 2, 6 pF ≤ CL,eff ≤ 10 pF (d) For XT1DRIVEx = 3, CL,eff ≥ 6 pF (5) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Because the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should always match the specification of the used crystal. (6) Requires external capacitors at both terminals. Values are specified by crystal manufacturers. (7) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag. Frequencies in between might set the flag. (8) Measured with logic-level input frequency but also applies to operation with crystals. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 55 |
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