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MSP430F5259 Datasheet(PDF) 80 Page - Texas Instruments |
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MSP430F5259 Datasheet(HTML) 80 Page - Texas Instruments |
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80 / 107 page ![]() P4.0/P4MAP0 P4.1/P4MAP1 P4.2/P4MAP2 P4.3/P4MAP3 P4.4/P4MAP4 P4.5/P4MAP5 P4.6/P4MAP6 P4.7/P4MAP7 Direction 0:Input 1:Output P4SEL.x 1 0 P4DIR.x P4IN.x EN toPortMappingControl 1 0 fromPortMappingControl P4OUT.x 1 0 DV SS DV IO P4REN.x PadLogic 1 P4DS.x 0:Lowdrive 1:Highdrive D fromPortMappingControl MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 SLAS903A – MAY 2013 – REVISED JULY 2013 www.ti.com Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger Table 55. Port P4 (P4.0 to P4.7) Pin Functions CONTROL BITS AND SIGNALS(1) PIN NAME (P4.x) x FUNCTION P4DIR.x(2) P4SEL.x P4MAPx P4.0/P4MAP0 0 P4.0 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.1/P4MAP1 1 P4.1 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.2/P4MAP2 2 P4.2 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.3/P4MAP3 3 P4.3 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.4/P4MAP4 4 P4.4 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.5/P4MAP5 5 P4.5 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.6/P4MAP6 6 P4.6 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 P4.7/P4MAP7 7 P4.7 (I/O) I: 0; O: 1 0 X Mapped secondary digital function X 1 ≤ 30 (1) X = Don't care (2) The direction of some mapped secondary functions are controlled directly by the module. See Table 11 for specific direction control information of mapped secondary functions. 80 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated |
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