PCI9060ES datasheet(3/192 Pages) ETC

3 / 192 page

PCI 9080

TABLE OF CONTENTS

©PLX Technology, Inc., 1997

Page iv

Version 1.01

FUNCTIONAL DESCRIPTION.......................................................................................................................................12

3.1

RESET ....................................................................................................................................................................12

3.1.1

PCI Bus Input RST# ......................................................................................................................................................... 12

3.1.2

Software Reset LRESETo# .............................................................................................................................................. 12

3.1.3

Local Bus Input LRESETi# ............................................................................................................................................... 12

3.1.4

Local Bus Output LRESETo# ........................................................................................................................................... 12

3.1.5

Software Reset ................................................................................................................................................................. 12

3.2

PCI 9080 INITIALIZATION ......................................................................................................................................12

3.2.1

Serial EEPROM Initialization ............................................................................................................................................ 13

3.2.2

Local Initialization ............................................................................................................................................................. 13

3.3

SERIAL EEPROM ...................................................................................................................................................13

3.3.1

Short Serial EEPROM Load.............................................................................................................................................. 13

3.3.2

Long Serial EEPROM Load .............................................................................................................................................. 14

3.3.3

Extra Long Serial EEPROM Load ..................................................................................................................................... 16

3.3.4

Recommended Serial EEPROMs ..................................................................................................................................... 16

3.3.5

Programming the Serial EEPROM.................................................................................................................................... 16

3.4

INTERNAL REGISTER ACCESS ...........................................................................................................................16

3.4.1

PCI Bus Access to Internal Registers ............................................................................................................................... 17

3.4.2

Local Bus Access to Internal Registers ............................................................................................................................ 17

3.5

RESPONSE TO FIFO FULL/EMPTY......................................................................................................................18

3.6

DIRECT DATA TRANSFER MODES......................................................................................................................18

3.6.1

Direct Master Operation (Local Master to PCI Target)...................................................................................................... 18

3.6.1.1

Decode ......................................................................................................................................................................... 19

3.6.1.2

FIFOs............................................................................................................................................................................ 19

3.6.1.3

Memory Access ............................................................................................................................................................ 19

3.6.1.4

IO/CFG Access............................................................................................................................................................. 20

3.6.1.5

I/O ................................................................................................................................................................................. 20

3.6.1.6

CFG (PCI Configuration Type 0 or Type 1 Cycles)....................................................................................................... 20

3.6.1.7

Direct Bus Master Lock................................................................................................................................................. 21

3.6.1.8

Master/Target Abort ...................................................................................................................................................... 21

3.6.1.9

Write and Invalidate ...................................................................................................................................................... 21

3.6.1.9.1

DMA Write and Invalidate ....................................................................................................................................... 21

3.6.1.9.2

Direct Master Write and Invalidate.......................................................................................................................... 21

3.6.2

Direct Slave Operation (PCI Master to Local Bus Access) ............................................................................................... 23

3.6.2.1

PCI 2.1 Mode................................................................................................................................................................ 23

3.6.2.2

PCI to Local Address Mapping ..................................................................................................................................... 24

3.6.2.2.1

Byte Enables .......................................................................................................................................................... 24

3.6.2.2.2

Local Bus Initialization Software ............................................................................................................................. 25

3.6.2.2.3

PCI Initialization Software ....................................................................................................................................... 25

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