PCI9060ES datasheet(33/192 Pages) ETC

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SECTION 3

PCI 9080

FUNCTIONAL DESCRIPTION

©PLX Technology, Inc., 1997

Page 24

Version 1.02

case when the Local Bus Latency Timer is enabled and

expires. (Refer to Figure 3-11 and Figure 3-12.)

; >; ,<

; -.

)

)=>) ;

&(); <);

; >

Figure 3-11. Direct Slave Write

For direct slave writes, the PCI (Master) writes data to

the local bus (slave). Direct Slave is the “Command from

the PCI host,” which has the highest priority. Direct

Slave or Direct Master pre-empts DMA; however, Direct

Slave does not pre-empt Direct Master (refer to Section

3.6.2.3.1, “Backoff”).

; >; ,<;

; -.

);

)=>)

&(); <);

Figure 3-12. Direct Slave Read

For direct slave reads, the PCI (Master) reads data from

the local bus (Slave).

PCI 9080 supports on-the-fly Endian conversion for

Space 0, Space 1, and expansion ROM space. The local

bus can be Big/Little Endian by either using the

BIGEND# input pin or the programmable internal register

configuration. When BIGEND# is asserted, it overwrites

the internal register configuration.

Note:

PCI bus is always Little Endian.

3.6.2.2 PCI to Local Address Mapping

Note:

Not applicable if I2O mode.

Three local address spaces—Space 0, Space 1, and

expansion ROM—are accessible from the PCI bus. Each

is defined by a set of three registers:

•

Local Address Range

•

Local Base Address

•

PCI Base Address

A fourth register, Bus Region Descriptor Register for PCI

to local accesses, defines the local bus characteristics

for both regions. (Refer to Figure 3-13.)

3.6.2.2.1 Byte Enables

LBE[3:0]# (pins 139-142) are encoded based on the

configured bus width, as follows:

32-Bit Bus—For a 32-bit bus, the four byte enables

indicate which of the four bytes are active during a data

cycle.

•

BE3# Byte Enable 3—LD[31:24]

•

BE2# Byte Enable 2—LD[23:16]

•

BE1# Byte Enable 1—LD[15:8]

•

BE0# Byte Enable 0—LD[7:0]

16-Bit Bus—For a 16-bit bus, BE3#, BE1# and BE0#

are encoded

provide

BHE#,

LA1,

and

BLE#,

respectively.

•

BE3# Byte High Enable (BHE#)—LD[15:8]

•

BE2# not used

•

BE1# Address bit 1 (LA1)

•

BE0# Byte Low Enable (BLE#)— LD[7:0]

8-Bit Bus—For an 8-bit bus, BE1# and BE0# are

encoded to provide LA1 and LA0, respectively.

•

BE3# not used

•

BE2# not used

•

BE1# Address bit 1 (LA1)

•

BE0# Address bit 0 (LA0)

Each PCI to Local Address space is defined as part of

reset initialization as described in the next section.

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