PCI9060ES datasheet(72/192 Pages) ETC

72 / 192 page

SECTION 4

PCI 9080

REGISTERS

©PLX Technology, Inc., 1997

Page 63

Version 1.02

4.4 LOCAL CONFIGURATION REGISTERS

4.4.1 (LAS0RR; PCI:00h, LOC:80h) Local Address Space 0 Range Register for PCI to Local

Bus

Table 4-33. (LAS0RR; PCI:00h, LOC:80h) Local Address Space 0 Range Register for PCI to Local Bus

Field

Description

Read

Write

Value after Reset

Memory Space Indicator. Value of 0 indicates Local address space 0 maps into PCI

memory space. Value of 1 indicates address space 0 maps into PCI I/O space.

Yes

2:1

If mapped into memory space, encoding is as follows:

2/1

Meaning

0 0

Locate anywhere in 32 bit PCI address space

0 1

Locate below 1 MB in PCI address space

1 0

Locate anywhere in 64 bit PCI address space

1 1

Reserved

If mapped into I/O space, bit 1 must be set to 0.

Bit 2 is included with bits [31:3] to indicate decoding range.

Yes

If mapped into memory space, a value of 1 indicates reads are prefetchable (bit has

no effect on the operation of the PCI 9080, but is used for system status). If

mapped into I/O space, bit is included with bits [31:2] to indicate decoding range.

Yes

31:4

Specifies which PCI address bits to use for decoding a PCI access to local bus

space 0. Each bit corresponds to a PCI address bit. Bit 31 corresponds to Address

bit 31. Write a value of 1 to all bits to be included in decode and a 0 to all others

(used in conjunction with PCI Configuration register 18h). Default is 1 MB.

Yes

FFF0000h

Notes: Range (not Range register) must be power of 2. “Range register value” is the inverse of range.

User should limit all I/O spaces to 256 bytes per PCI v2.1 spec.

4.4.2 (LAS0BA; PCI:04h, LOC:84h) Local Address Space 0 Local Base Address (Remap)

Table 4-34. (LAS0BA; PCI:04h, LOC:84h) Local Address Space 0 Local Base Address (Remap) Register

Field

Description

Read

Write

Value after Reset

Space 0 Enable. Value of 1 enables decoding of PCI addresses for Direct Slave

access to local space 0. Value of 0 disables decoding. If this bit is set to 0, the PCI

BIOS may not allocate (assign) the base address for Space 0.

Note:

Must be set to 1 for any Direct Slave access to Space 0.

Yes

Reserved.

Yes

3:2

If local space 0 is mapped into memory space, bits are not used. If mapped into I/O

space, bit is included with bits [31:4] for remapping.

Yes

31:4

Remap of PCI Address to Local Address Space 0 into a Local Address Space. The

bits in this register remap (replace) the PCI Address bits used in decode as the

Local Address bits.

Note:

Remap Address value must be multiple of Range (not the Range

Yes

PCI9060ES Datasheet(PDF) 72 Page - List of Unclassifed Manufacturers

PCI9060ES Datasheet(HTML) 72 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL