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PCI9060ES Datasheet(PDF) 53 Page - List of Unclassifed Manufacturers |
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PCI9060ES Datasheet(HTML) 53 Page - List of Unclassifed Manufacturers |
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53 / 192 page ![]() SECTION 4 PCI 9080 REGISTERS ©PLX Technology, Inc., 1997 Page 44 Version 1.02 4.1.1 Register Differences between PCI 9080 and PCI 9060, PCI 9060ES, and PCI 9060SD Table 4-2. Register Differences between PCI 9080 and PCI 9060 Register PCI/Local Offset Bits Description PCIIDR 00/00 31:16 Default changed from PCI 9060 to PCI 9080 PCICR 04/04 4 Memory Write and Invalidate now supported PCISR 06/06 6 User definable bit added PCICLSR 0C/0C 7:0 Cache line size is now used for Memory Write and Invalidate PCIBAR0 10/10 8:6 Register Bank size changed from 128 to 256 PCIBAR1 14/14 8:6 Register Bank size changed from 128 to 256 PCIBAR3 1C/1C 31:0 Base address register for Local Address Space 1 PCISVID 2C/2C 15:0 Subsystem Vendor ID Register PCISID 2E/2E 15:0 Subsystem ID Register 31:0 Mode/Arbitration Register now accessible from PCI bus 21 Local Bus Direct Slave Give up Bus Mode 22 Direct Slave Lock Enable 23 PCI Request Mode 24 PCI Rev 2.1 Mode 25 PCI Read/No Write Mode 26 PCI Read with Write Flush Mode 27 Get the Local Bus Latency Timer with BREQ MARBR 08, AC/88, 12C 28 PCI Read/No Flush Mode BIGEND 0C/8C 7:0 Big/Little Endian Descriptor Register EROMBA 14/94 5 BREQo Timer Resolution control 1:0 Local bus width now programmable in S mode 10 Read Prefetch Count Enable 14:11 Read Prefetch Count 17:16 Local bus width now programmable in S mode LBRD0 18/98 25 Extra long serial EEPROM load bit 12, 3 Direct Master Read Prefetch Size Control 10, 8:5 Programmable Almost Full Flag increased by two bits 11 Direct Master Prefetch Limit 13 I/O Remap select DMPBAM 28/A8 15:14 Direct Master Write Delay LAS1RR F0/170 31:0 Local Address Space 1 Range Register LAS1BA F4/174 31:0 Local Address Space 1 Local Base Address Register (Remap) LBRD1 F8/178 31:0 Local Address Space 1 Bus Region Descriptor Register MBOX0 40, 78/C0 31:0 MBOX0 moved to PCI address 78 when Messaging Queue is enabled MBOX1 44, 7C/C4 31:0 MBOX1 moved to PCI address 7C when Messaging Queue is enabled |
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