Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

PCI9060ES Datasheet(PDF) 71 Page - List of Unclassifed Manufacturers

Part # PCI9060ES
Description  12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PDF  192 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC - List of Unclassifed Manufacturers

PCI9060ES Datasheet(HTML) 71 Page - List of Unclassifed Manufacturers

Back Button PCI9060ES Datasheet HTML 67Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 68Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 69Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 70Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 71Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 72Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 73Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 74Page - List of Unclassifed Manufacturers PCI9060ES Datasheet HTML 75Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 71 / 192 page
background image
SECTION 4
PCI 9080
REGISTERS
©PLX Technology, Inc., 1997
Page 62
Version 1.02
4.3.21 (PCIIPR; PCI:3Dh, LOC:3Dh) PCI Interrupt Pin Register
Table 4-30. (PCIIPR; PCI:3Dh, LOC:3Dh) PCI Interrupt Pin Register
Field
Description
Read
Write
Value after Reset
7:0
Interrupt Pin Register. Indicates which interrupt pin the device uses. The following
values are decoded:
0 = No Interrupt Pin
1 = INTA#
2 = INTB#
3 = INTC#
4 = INTD#
Note:
PCI 9080 supports only one PCI interrupt pin (INTA#).
Yes
Local/
Serial
EEPROM
1
4.3.22 (PCIMGR; PCI:3Eh, LOC:3Eh) PCI Min_Gnt Register
Table 4-31. (PCIMGR; PCI:3Eh, LOC:3Eh) PCI Min_Gnt Register
Field
Description
Read
Write
Value after Reset
7:0
Min_Gnt. Specifies how long a burst period the device needs, assuming a clock
rate of 33 MHz. Value is multiple of 1/4 µsec increments.
Yes
Local/
Serial
EEPROM
0
4.3.23 (PCIMLR; PCI:3Fh, LOC:3Fh) PCI Max_Lat Register
Table 4-32. (PCIMLR; PCI:3Fh, LOC:3Fh) PCI Max_Lat Register
Field
Description
Read
Write
Value after Reset
7:0
Max_Lat. Specifies how often the device must gain access to the PCI bus. Value
is multiple of 1/4 µsec increments.
Yes
Local/
Serial
EEPROM
0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com