MSC1210 datasheet(45/83 Pages) TI

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MSC1210

SBAS203F − MARCH 2002 − REVISED NOVEMBER 2004

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Memory Control (MCON)

Reset Value

SFR 95h

BPSEL

—

RAMMAP

00h

BPSEL

Breakpoint Address Selection

bit 7

Write: Select one of two Breakpoint registers: 0 or 1.

0: Select breakpoint register 0.

1: Select breakpoint register 1.

Read: Provides the Breakpoint register that created the last interrupt: 0 or 1.

RAMMAP

Memory Map 1kB extended SRAM.

bit 0

0: Address is: 0000h—03FFh (default) (Data Memory)

1: Address is 8400h—87FFh (Data and Program Memory)

Serial Port 0 Control (SCON0)

Reset Value

SFR 98h

SM0_0

SM1_0

SM2_0

REN_0

TB8_0

RB8_0

TI_0

RI_0

00h

SM0−2

Serial Port 0 Mode. These bits control the mode of serial Port 0. Modes 1, 2, and 3 have 1 start and 1 stop bit in

bits 7−5

addition to the 8 or 9 data bits.

MODE

SM0

SM1

SM2

FUNCTION

LENGTH

PERIOD

Synchronous

8 bits

12 pCLK(1)

Synchronous

8 bits

4 pCLK(1)

1(2)

Asynchronous

10 bits

Timer 1 or 2 Baud Rate Equation

1(2)

Valid Stop Required(3)

10 bits

Timer 1 Baud Rate Equation

Asynchronous

11 bits

64 pCLK(1) (SMOD = 0)

32 pCLK(1) (SMOD = 1)

Asynchronous with Multiprocessor Communication(4)

11 bits

64 pCLK(1) (SMOD = 0)

32 pCLK(1) (SMOD = 1)

3(2)

Asynchronous

11 bits

Timer 1 or 2 Baud Rate Equation

3(2)

Asynchronous with Multiprocessor Communication(4)

11 bits

Timer 1 or 2 Baud Rate Equation

(1) pCLK will be equal to tCLK, except that pCLK will stop for IDLE.

(2) For modes 1 and 3, the selection of Timer 1 or 2 for baud rate is specified via the T2CON (C8h) register.

(3) RI_0 will only be activated when a valid STOP is received.

(4) RI_0 will not be activated if bit 9 = 0.

REN_0

Receive Enable. This bit enables/disables the serial Port 0 received shift register.

bit 4

0: Serial Port 0 reception disabled.

1: Serial Port 0 received enabled (modes 1, 2, and 3). Initiate synchronous reception (mode 0).

TB8_0

9th Transmission Bit State. This bit defines the state of the 9th transmission bit in serial Port 0 modes 2 and 3.

bit 3

RB8_0

9th Received Bit State. This bit identifies the state of the 9th reception bit of received data in serial Port 0 modes

bit 2

2 and 3. In serial port mode 1, when SM2_0 = 0, RB8_0 is the state of the stop bit. RB8_0 is not used in mode 0.

TI_0

Transmitter Interrupt Flag. This bit indicates that data in the serial Port 0 buffer has been completely shifted out. In serial

bit 1

port mode 0, TI_0 is set at the end of the 8th data bit. In all other modes, this bit is set at the end of the last data bit.

This bit must be manually cleared by software.

RI_0

Receiver Interrupt Flag. This bit indicates that a byte of data has been received in the serial Port 0 buffer. In serial

bit 0

port mode 0, RI_0 is set at the end of the 8th bit. In serial port mode 1, RI_0 is set after the last sample of the incoming

stop bit subject to the state of SM2_0. In modes 2 and 3, RI_0 is set after the last sample of RB8_0. This bit must

be manually cleared by software.

MSC1210 Datasheet(PDF) 45 Page - Texas Instruments

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