MSC1210 datasheet(34/83 Pages) TI

34 / 83 page

MSC1210

SBAS203F − MARCH 2002 − REVISED NOVEMBER 2004

www.ti.com

Hardware Configuration Register 1 (HCR1)

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

CADDR 7Eh

DBLSEL1

DBLSEL0

ABLSEL1

ABLSEL0

DAB

DDB

EGP0

EGP23

To read this register during normal operation, refer to the register descriptions for CADDR and CDATA.

DBLSEL

Digital Brownout Level Select

bits 7−6

00: 4.5V

01: 4.2V

10: 2.7V

11: 2.5V (default)

ABLSEL

Analog Brownout Level Select

bits 5−4

00: 4.5V

01: 4.2V

10: 2.7V

11: 2.5V (default)

DAB

Disable Analog Power-Supply Brownout Reset

bit 3

0: Enable Analog Brownout Reset

1: Disable Analog Brownout Reset (default) (will not disable unless AVDD > 2.0V)

DDB

Disable Digital Power-Supply Brownout Reset

bit 2

0: Enable Digital Brownout Reset

1: Disable Digital Brownout Reset (default)

EGP0

Enable General-Purpose I/O for Port 0

bit 1

0: Port 0 is Used for External Memory, P3.6 and P3.7 Used for WR and RD.

1: Port 0 is Used as General-Purpose I/O (default)

EGP23

Enable General-Purpose I/O for Ports 2 and 3

bit 0

0: Port 2 is Used for External Memory, P3.6 and P3.7. Used for WR and RD.

1: Port 2 and Port3 are Used as General-Purpose I/O (default)

Configuration Memory Programming

Certain key functions such as Brownout Reset and Watchdog Timer are controlled by the hardware configuration bits.

These bits are nonvolatile and can only be changed through serial and parallel programming. Other peripheral control and

status functions, such as ADC configuration, timer setup, and Flash control, are controlled through the SFRs.

MSC1210 Datasheet(PDF) 34 Page - Texas Instruments

MSC1210 Datasheet(HTML) 34 Page - Texas Instruments

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