MSC1210 datasheet(69/83 Pages) TI

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MSC1210

SBAS203F − MARCH 2002 − REVISED NOVEMBER 2004

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Enable Interrupt Control (EICON)

Reset Value

SFR D8h

SMOD1

EAI

WDTI

40h

SMOD1

Serial Port 1 Mode. When this bit is set the serial baud rate for Port 1 will be doubled.

bit 7

0 = Standard baud rate for Port 1 (default).

1 = Double baud rate for Port 1.

EAI

Enable Auxiliary Interrupt. The Auxiliary Interrupt accesses nine different interrupts which are masked and

bit 5

identified by SFR registers PAI (SFR A5h), AIE (SFR A6h), and AISTAT (SFR A7h).

0 = Auxiliary Interrupt disabled (default).

1 = Auxiliary Interrupt enabled.

Auxiliary Interrupt Flag. AI must be cleared by software before exiting the interrupt service routine, after the source

bit 4

of the interrupt is cleared. Otherwise, the interrupt occurs again. Setting AI in software generates an Auxiliary

Interrupt, if enabled.

0 = No Auxiliary Interrupt detected (default).

1 = Auxiliary Interrupt detected.

WDTI

Watchdog Timer Interrupt Flag. WDTI must be cleared by software before exiting the interrupt service routine.

bit 3

Otherwise, the interrupt will occur again. Setting WDTI in software generates a watchdog time interrupt, if enabled.

The Watchdog timer can generate an interrupt or reset. The interrupt is available only if the reset action is disabled

in HCR0.

0 = No Watchdog Timer Interrupt detected (default).

1 = Watchdog Timer Interrupt detected.

ADC Results Register Low Byte (ADRESL)

Reset Value

SFR D9h

00h

ADRESL

The ADC Results Low Byte. This is the low byte of the 24-bit word that contains the ADC converter results.

bits 7−0

Reading from this register clears the ADC interrupt.

ADC Results Register Middle Byte (ADRESM)

Reset Value

SFR DAh

00h

ADRESM

The ADC Results Middle Byte. This is the middle byte of the 24-bit word that contains the ADC converter results.

bits 7−0

ADC Results Register High Byte (ADRESH)

Reset Value

SFR DBh

00h

ADRESH

The ADC Results High Byte. This is the high byte of the 24-bit word that contains the ADC converter results.

bits 7−0

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