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MSC1210 Datasheet(PDF) 71 Page - Texas Instruments

Part # MSC1210
Description  Precision Analog-to-Digital Converter (ADC) with 8051 Microcontroller and Flash Memory
PDF  83 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSC1210 Datasheet(HTML) 71 Page - Texas Instruments

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MSC1210
SBAS203F − MARCH 2002 − REVISED NOVEMBER 2004
www.ti.com
71
ADC Control Register 1 (ADCON1)
7
6
5
4
3
2
1
0
Reset Value
SFR DDh
OF_UF
POL
SM1
SM0
—
CAL2
CAL1
CAL0
0000 0000b
OF_UF
Overflow/Underflow. If this bit is set, the data in the summation register is invalid. Either an overflow or underflow
bit 7
occurred. The bit is cleared by writing a ‘0’ to it.
POL
Polarity. Polarity of the ADC result and Summation register.
bit 6
0 = Bipolar.
1 = Unipolar. The LSB size is 1/2 the size of bipolar (twice the resolution).
POL
ANALOG INPUT
DIGITAL OUTPUT
+FSR
0x7FFFFF
0
ZERO
0x000000
0
−FSR
0x800000
+FSR
0xFFFFFF
1
ZERO
0x000000
1
−FSR
0x000000
SM1−0
Settling Mode. Selects the type of filter or auto select which defines the digital filter settling characteristics.
bits 5−4
SM1
SM0
SETTLING MODE
0
0
Auto
0
1
Fast Settling Filter
1
0
Sinc2 Filter
1
1
Sinc3 Filter
CAL2−0
Calibration Mode Control Bits.
bits 2−0
CAL2
CAL1
CAL0
CALIBRATION MODE
0
0
0
No Calibration (default)
0
0
1
Self-Calibration, Offset and Gain
0
1
0
Self-Calibration, Offset only
0
1
1
Self-Calibration, Gain only
1
0
0
System Calibration, Offset only (requires external connection)
1
0
1
System Calibration, Gain only (requires external connection)
1
1
0
Reserved
1
1
1
Reserved
NOTE: Read Value—000b.
ADC Control Register 2 (ADCON2)
7
6
5
4
3
2
1
0
Reset Value
SFR DEh
DR7
DR6
DR5
DR4
DR3
DR2
DR1
DR0
1Bh
DR7−0
Decimation Ratio LSB.
bits 7−0
ADC Control Register 3 (ADCON3)
7
6
5
4
3
2
1
0
Reset Value
SFR DDh
—
—
—
—
—
DR10
DR9
DR8
06h
DR10−8
Decimation Ratio Most Significant 3 Bits. The output data rate = (ACLK + 1)/64/Decimation Ratio.
bits 2−0



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