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ELANSC520 Datasheet(PDF) 192 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 192 Page - Advanced Micro Devices |
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192 / 440 page  GP DMA Controller Registers 11-60 Élan™SC520 Microcontroller Register Set Manual Slave DMA Mask Reset (SLDMAMSKRST) Direct-Mapped I/O Address 000Eh Register Description This register provides a mechanism to reset the SLDMAGENMSK register (see page 11-61). Bit Definitions Programming Notes The same DMA channel masks can be controlled via DMA registers SLDMAMSK (see page 11-54), SLDMAMSKRST, and SLDMAGENMSK (see page 11-61). Before masking an active DMA channel, software must ensure that the DMA request is deasserted. Masking an active channel while it is being granted might cause the system to hang. 7 6 5 4 3 2 1 0 Bit SLAVE_MSK_RST[7–0] Reset xxxxxxxx R/W W! Bit Name Function 7–0 SLAVE_MSK_ RST[7–0] Slave DMA Reset Mask Writing any data to this I/O address resets the SLDMAGENMSK register (see page 11-61), thereby activating the four slave DMA channels. |
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