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ELANSC520 Datasheet(PDF) 190 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 190 Page - Advanced Micro Devices |
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190 / 440 page ![]() GP DMA Controller Registers 11-58 Élan™SC520 Microcontroller Register Set Manual Slave DMA Controller Reset (SLDMARST) Direct-Mapped I/O Address 000Dh Register Description This register provides a reset mechanism for Channels 0–3. Bit Definitions Programming Notes 7 6 5 4 3 2 1 0 Bit SLAVE_RST[7–0] Reset 00000000 R/W W! Bit Name Function 7–0 SLAVE_RST [7–0] Slave DMA Controller Reset A write of any data to this address resets the DMA controller to the same state as a system reset. |
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