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ELANSC520 Datasheet(PDF) 189 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 189 Page - Advanced Micro Devices |
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189 / 440 page ![]() GP DMA Controller Registers Élan™SC520 Microcontroller Register Set Manual 11-57 Slave DMA Clear Byte Pointer (SLDMACBP) Direct-Mapped I/O Address 000Ch Register Description This register channel provides a mechanism to adjust the byte pointer to the low byte of the memory address and transfer count registers for Channels 0–3. Bit Definitions Programming Notes 7 6 5 4 3 2 1 0 Bit SLAVE_CBP[7–0] Reset xxxxxxxx R/W W! Bit Name Function 7–0 SLAVE_CBP [7–0] Slave DMA Clear Byte Pointer The DMA controller’s 16-bit memory address and terminal count registers are accessed by writing or reading consecutive 8-bit values to the same direct-mapped I/O address. A single byte pointer is used across the slave DMA controller to determine which byte is accessed if any of these 16-bit registers is read or written. Any access to one of these registers toggles the byte pointer between the low and high bytes. A write of any data to this bit field (SLAVE_CBP) clears the byte pointer so that the next memory address or transfer count register access is to the low byte. |
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