ELANSC520 datasheet(117/440 Pages) AMD

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Élan™SC520 Microcontroller Register Set Manual

10-1

CHAPTER

10 GENERAL-PURPOSE BUS

CONTROLLER REGISTERS

10.1

OVERVIEW

This chapter describes the general-purpose (GP) bus registers of the ÉlanSC520

microcontroller.

The GP bus is used for glueless connection of 8- and 16-bit devices to the ÉlanSC520

microcontroller. To provide the glueless interface, the GP bus interface timing and data bus

width is programmable.

The GP bus register set consists of 12 memory-mapped configuration region (MMCR)

registers used to configure the GP bus timing and data bus width. See the

Élan™SC520

Microcontroller User’s Manual, order #22004, for details about the GP bus.

Table 10-1 lists the GP bus registers in offset order, with the corresponding description’s

page number.

10.2

REGISTERS

Table 10-1

GP Bus MMCR Registers

Mnemonic

MMCR Offset

Page Number

GP Echo Mode

GPECHO

C00h

page 10-2

GP Chip Select Data Width

GPCSDW

C01h

page 10-3

GP Chip Select Qualification

GPCSQUAL

C02h

page 10-5

GP Chip Select Recovery Time

GPCSRT

C08h

page 10-7

GP Chip Select Pulse Width

GPCSPW

C09h

page 10-8

GP Chip Select Offset

GPCSOFF

C0Ah

page 10-9

GP Read Pulse Width

GPRDW

C0Bh

page 10-10

GP Read Offset

GPRDOFF

C0Ch

page 10-11

GP Write Pulse Width

GPWRW

C0Dh

page 10-12

GP Write Offset

GPWROFF

C0Eh

page 10-13

GPALE Pulse Width

GPALEW

C0Fh

page 10-14

GPALE Offset

GPALEOFF

C10h

page 10-15

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