Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

ELANSC520 Datasheet(PDF) 146 Page - Advanced Micro Devices

Part # ELANSC520
Description  Microcontroller
PDF  440 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

ELANSC520 Datasheet(HTML) 146 Page - Advanced Micro Devices

Back Button ELANSC520 Datasheet HTML 142Page - Advanced Micro Devices ELANSC520 Datasheet HTML 143Page - Advanced Micro Devices ELANSC520 Datasheet HTML 144Page - Advanced Micro Devices ELANSC520 Datasheet HTML 145Page - Advanced Micro Devices ELANSC520 Datasheet HTML 146Page - Advanced Micro Devices ELANSC520 Datasheet HTML 147Page - Advanced Micro Devices ELANSC520 Datasheet HTML 148Page - Advanced Micro Devices ELANSC520 Datasheet HTML 149Page - Advanced Micro Devices ELANSC520 Datasheet HTML 150Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 146 / 440 page
background image
GP DMA Controller Registers
11-14
Élan™SC520 Microcontroller Register Set Manual
GP-DMA Channel 5 Extended Page (GPDMAEXTPG5)
Memory-Mapped
MMCR Offset D8Ah
Register Description
This register provides the extended page address for Channel 5.
Bit Definitions
Programming Notes
The extended page address is used in conjunction with the memory address and the page address registers for the
associated channel to make up a 28-bit address (A27–A0).
In enhanced mode, the Channel 5 extended page address bit field (DMA5ADR[27–24]) increments or decrements
if the memory address crosses the 16-Mbyte boundary. In normal mode, these bits remain constant during the DMA
transfer.
Enhanced mode is enabled by setting the ENH_MODE_ENB bit in the GPDMACTL register (see page 11-4).
7
6
5
4
3
2
1
0
Bit
Reserved
DMA5ADR[27
–24]
Reset
00000000
R/W
RSV
R/W!
Bit
Name
Function
7–4
Reserved
Reserved
This bit field should be written to 0 for normal system operation.
3–0
DMA5ADR
[27–24]
DMA Channel 5 Extended Page Address
This bit field specifies the highest four memory address bits (A27–A24) for Channel 5.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com